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SN75LVPE801 Datasheet(PDF) 21 Page - Texas Instruments |
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SN75LVPE801 Datasheet(HTML) 21 Page - Texas Instruments |
21 / 34 page SN75LVPE801 VCC 1 RX+ 2 RX- 3 EQ 4 GND 5 TX- 6 TX+ 7 DE 8 220nF 220nF 220nF 220nF 330 330 330 330 SN75LVPE801 VCC 1 RX+ 2 RX- 3 EQ 4 GND 5 TX- 6 TX+ 7 DE 8 470nF 470nF VCC VCC 200nF 200nF 220nF 220nF Host Controller Connector Device Copyright © 2016, Texas Instruments Incorporated 21 SN75LVPE801 www.ti.com SLLSEW8 – SEPTEMBER 2016 Product Folder Links: SN75LVPE801 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 10.2.4.3 Application Curve Eye-diagrams were taken on the SN75LVPE801 configured as in Figure 24 above. Testing was performed at a PCIe 3.0 speed of 8Gbps. Figure 26. SN75LVPE801 8-Gbps Eye-Diagram 10.2.5 PCIe Applications PCIe-only applications are implemented in a manner very similar to SATA Express applications as covered in Detailed Design Procedure. Looking at Figure 27, and comparing it to the SATA Express application in Figure 24, a single change is noted. For PCIe applications the 220 nF AC-coupling capacitors on the Host-to-Device link are relocated from the Device side of the connector to the Host side. No other changes are required. Figure 27. SN75LVPE801 PCI-Express Reference Schematic EQ: 7 dB when Floated, DE: 0 dB when Floated 11 Power Supply Recommendations The SN75LVPE801DRF is designed to operate from a single 3.3-V supply. Always practice proper power-supply sequencing procedure. Apply VCC first before any input signals are applied to the device. The power-down sequence is in reverse order. |
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