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ICE3A1065ELJ Datasheet(PDF) 10 Page - Infineon Technologies AG |
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ICE3A1065ELJ Datasheet(HTML) 10 Page - Infineon Technologies AG |
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10 / 29 page  PWM OP 0.6V 10k Ω Oscillator C8 T2 R1 C1 FB PWM-Latch V1 Gate Driver Voltage Ramp VOSC Soft-Start Comparator time delay circuit (156ns) X3.2 PWM Comparator CoolSET®-F3 ICE3A1065ELJ Functional Description Version 2.3 10 19 Nov 2012 Figure 6 Improved Current Mode t t VOSC 0.6V FB t max. Duty Cycle Gate Driver Voltage Ramp 156ns time delay Figure 7 Light Load Conditions 3.3.1 PWM-OP The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin CS. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.2 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWM- Comparator C8 and the Soft-Start-Comparator (see Figure 6). 3.3.2 PWM-Comparator The PWM-Comparator compares the sensed current signal of the integrated CoolMOS® with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external transistor in combination with the internal pull-up resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS® exceeds the signal VFB the PWM-Comparator switches off the Gate Driver. X3.2 PWM OP Improved Current Mode PWM Comparator CS Soft-Start Comparator 5V C8 0.6V FB Optocoupler RFB PWM-Latch Figure 8 PWM Controlling |
Similar Part No. - ICE3A1065ELJ_12 |
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Similar Description - ICE3A1065ELJ_12 |
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