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73K224L Datasheet(PDF) 8 Page - TDK Electronics |
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73K224L Datasheet(HTML) 8 Page - TDK Electronics |
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8 / 32 page  73K224L V.22bis/V.22/V.21/Bell 212A/Bell 103 Single-Chip Modem 8 CONTROL REGISTER 0 D7 D6 D5 D4 D3 D2 D1 D0 CR0 000 MODUL. OPTION MODUL. TYPE 1 MODUL. TYPE 0 TRANSMIT MODE 2 TRANSMIT MODE 1 TRANSMIT MODE 0 TRANSMIT ENABLE ANSWER/ ORIGINATE BIT NO. NAME CONDITION DESCRIPTION 0 Selects answer mode (transmit in high band, receive in low band). D0 Answer/ Originate 1 Selects originate mode (transmit in low band, receive in high band). 0 Disables transmit output at TXA. 1 Enables transmit output at TXA. D1 Transmit Enable Note: Transmit Enable must be set to 1 to allow activation of Answer Tone or DTMF. D5 D4 D3 D2 0 0 0 0 Selects power down mode. All functions disabled except digital interface. 0 0 0 1 Internal synchronous mode. In this mode TXCLK is an internally derived 600,1200 or 2400 Hz signal. Serial input data appearing at TXD must be valid on the rising edge of TXCLK. Receive data is clocked out of RXD on the falling edge of RXCLK. 0 0 1 0 External synchronous mode. Operation is identical to internal synchronous, but TXCLK is connected internally to EXCLK pin, and a 600, 1200 or 2400 Hz clock must be supplied externally. 0 0 1 1 Slave synchronous mode. Same operation as other synchronous modes. TXCLK is connected internally to the RXCLK pin in this mode. 0 1 0 0 Selects asynchronous mode - 8 bits/character (1 start bit, 6 data bits, 1 stop bit). 0 1 0 1 Selects asynchronous mode - 9 bits/character (1 start bit, 7 data bits, 1 stop bit). 0 1 1 0 Selects asynchronous mode - 10 bits/character (1 start bit, 8 data bits, 1 stop bit). 0 1 1 1 Selects asynchronous mode - 11 bits/character (1 start bit, 8 data bits, Parity and/or 1 or 2 stop bits). D5, D4, D3, D2 Transmit Mode 1 X 0 0 Selects FSK operation. D6 D5 1 0 QAM 0 0 DPSK D6,D5 Modulation Type 0 1 FSK |
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