ADN2812ACP datasheet(5/28 Pages) AD

Part #	ADN2812ACP

Description	Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

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ADN2812

Rev. 0 | Page 5 of 28

OUTPUT AND TIMING SPECIFICATIONS

Table 3.

Parameter

Conditions

Min

Typ

Max

Unit

CML OUPUT CHARACTERISTICS

(CLKOUTP/N, DATAOUTP/N)

Single-Ended Output Swing

VSE (see Figure 3)

300

350

600

mV

Differential Output Swing

VDIFF (see Figure 3)

600

700

1200

mV

Output High Voltage

VOH

VCC

V

Output Low Voltage

VOL

VCC − 0.6

VCC − 0.35

VCC − 0.3

V

CML Ouputs Timing

Rise Time

20% to 80%

95

112

ps

Fall Time

80% to 20%

95

123

ps

Setup Time

TS (see Figure 2), OC-48

150

200

250

ps

Hold Time

TH (see Figure 2), OC-48

150

200

250

ps

I2C INTERFACE DC CHARACTERISTICS

LVCMOS

Input High Voltage

VIH

0.7 VCC

V

Input Low Voltage

VIL

0.3 VCC

V

Input Current

VIN = 0.1 VCC or VIN = 0.9 VCC

−10.0

+10.0

µA

Output Low Voltage

VOL, IOL = 3.0 mA

0.4

V

I2C INTERFACE TIMING

(See Figure 11)

SCK Clock Frequency

400

kHz

SCK Pulse Width High

tHIGH

600

ns

SCK Pulse Width Low

tLOW

1300

ns

Start Condition Hold Time

tHD;STA

600

ns

Start Condition Setup Time

tSU;STA

600

ns

Data Setup Time

tSU;DAT

100

ns

Data Hold Time

tHD;DAT

300

ns

SCK/SDA Rise/Fall Time

TR/TF

20 + 0.1 Cb4

300

ns

Stop Condition Setup Time

tSU;STO

600

ns

Bus Free Time between a Stop and a Start

tBUF

1300

ns

REFCLK CHARACTERISTICS

Optional lock to REFCLK mode

Input Voltage Range

@ REFCLKP or REFCLKN

VIL

0

V

VIH

VCC

V

Minimum Differential Input Drive

100

mV p-p

Reference Frequency

12.3

200

MHz

Required Accuracy

100

ppm

LVTTL DC INPUT CHARACTERISTICS

Input High Voltage

VIH

2.0

V

Input Low Voltage

VIL

0.8

V

Input High Current

IIH, VIN = 2.4 V

5

µA

Input Low Current

IIL, VIN = 0.4 V

−5

µA

LVTTL DC OUTPUT CHARACTERISTICS

Output High Voltage

VOH, IOH = −2.0 mA

2.4

V

Output Low Voltage

VOL, IOL = 2.0 mA

0.4

V

4 Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed (see Table 6).

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