ADS8383

SLAS005B – DECEMBER 2002 – REVISED MAY 2003

www.ti.com

5

SPECIFICATIONS (CONTINUED)

TA = –40°C to 85°C, +VA = +5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 500 kHz (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Digital Input/Output

Logic family

CMOS

VIH

IIH = 5 µA

+VBD–1

+VBD + 0.3

Logic level

VIL

IIL = 5 µA

–0.3

0.8

V

Logic level

VOH

IOH = 2 TTL loads

+VBD – 0.6

V

VOL

IOL = 2 TTL loads

0.4

Data format

Straight

Binary

Power Supply Requirements

Power supply voltage

+VBD (see Notes 1 and 2)

2.95

3.3

5.25

V

Power supply voltage

+VA (see Note 2)

4.75

5

5.25

V

Supply current, 500-kHz sample rate (see Note 3)

22

26

mA

Power dissipation, 500-kHz sample rate (see Note 3)

110

130

mW

Temperature Range

Operatingfree-air

–40

85

°C

(1) The difference between +VA and +VBD should be no less than 2.3 V, i.e. if +VA is 5.5 V, +VBD should be at least 2.95 V.

(2) +VBD

≥ +VA – 2.3 V

(3) This includes only +VA current. +VBD current is typical 1 mA with 5 pF load capacitance on all output pins.