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HT24LC04 Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT24LC04 Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
5 / 11 page HT24LC04 Rev. 1.30 5 November 25, 2003 · Acknowledge polling To maximize bus throughput, one technique is to allow the master to poll for an acknowledge signal after the start condition and the control byte for a write com- mand have been sent. If the device is still busy imple- menting its write cycle, then no ACK will be returned. The master can send the next read/write command when the ACK signal has finally been received. · Write protect The HT24LC04 has a write-protect function and pro- gramming will then be inhibited when the WP pin is connected to VCC. Under this mode, the HT24LC04 is used as a serial ROM. · Read operations The HT24LC04 supports three read operations, namely, current address read, random address read and sequential read. During read operation execution, the read/write select bit should be set to ²1². · Current address read The internal data word address counter maintains the last address accessed during the last read or write op- eration, incremented by one. This address stays valid between operations as long as the chip power is main- tained. The address roll over during read from the last byte of the last memory page to the first byte of the first page. The address roll over during write from the last byte of the current page to the first byte of the same page. Once the device address with the read/write se- lect bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is seri- ally clocked out. The microcontroller should respond with a ²no ACK² signal (high) followed by a stop condi- tion (refer to Current read timing). · Random read A random read requires a dummy byte write sequence to load in the data word address which is then clocked in and acknowledged by the EEPROM. The microcontroller must then generate another start con- dition. The microcontroller now initiates a current ad- dress read by sending a device address with the read/write select bit high. The EEPROM acknowl- edges the device address and serially clocks out the data word. The microcontroller should respond with a ²no ACK² signal (high) followed by a stop condition (refer to Random read timing). A 2 A 1 A 0 S P D e v i c e a d d r e s s D A T A A C K S t o p S t a r t S D A N o A C K Current Read Timing P D e v i c e a d d r e s s W o r d a d d r e s s A C K S t o p S t a r t S D A A C K N o A C K S A C K D A T A S A 2 A 1 A 0 D e v i c e a d d r e s s S t a r t Random Read Timing S e n d W r i t e C o m m a n d S e n d S t o p C o n d i t i o n t o I n i t i a t e W r i t e C y c l e S e n d S t a r t S e n d C o t r o l l B y t e w i t h R / W = 0 ( A C K = 0 ) ? N e x t O p e r a t i o n N o Y e s Acknowledge Polling Flow |
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