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L6712ADTR Datasheet(PDF) 6 Page - STMicroelectronics

Part # L6712ADTR
Description  TWO-PHASE INTERLEAVED DC/DC CONTROLLER
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6712ADTR Datasheet(HTML) 6 Page - STMicroelectronics

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L6712A L6712
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(*) Pin not reported in QFN column have to be considered as Not Connected, not internally bonded.
16
16
ISEN2
Channel 2 current sense pin. The output current may be sensed across a sense
resistor or across the low-side mosfet RdsON. This pin has to be connected to the
low-side mosfet drain or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as
possible to the PGNDS net in order to couple in common mode any picked-up
noise.
17
18
OSC/INH
FAULT
Oscillator pin.
It allows programming the switching frequency of each channel: the equivalent
switching frequency at the load side results in being doubled.
Internally fixed at 1.24V, the frequency is varied proportionally to the current sunk
(forced) from (into) the pin with an internal gain of 6kHz/
µA (See relevant section
for details). If the pin is not connected, the switching frequency is 150kHz for
each channel (300kHz on the load).
The pin is forced high (5V Typ.) when an Over Voltage is detected; to recover
from this condition, cycle VCC.
Forcing the pin to a voltage lower than 0.6V, the device stops operation and
enters the inhibit state.
18
20
FBG
Remote sense amplifier inverting input. It has to be connected to the negative
side of the load to perform programmable remote sensing through apposite
resistors (see relative section).
19
21
FBR
Remote sense amplifier non-inverting input. It has to be connected to the positive
side of the load to perform programmable remote sensing through apposite
resistors (see relative section).
20 to 22
22 to 24
VID0-2
Voltage IDentification pins. These input are internally pulled-up. They are used to
program the output voltage as specified in Table 1 and to set the PGOOD, OVP
and UVP thresholds.
Connect to GND to program a ‘0’ while leave floating to program a ‘1’.
23
25
PGOOD
This pin is an open collector output and is pulled low if the output voltage is not
within the above specified thresholds and during soft-start.
It cannot be pulled up above 5V. If not used may be left floating.
24
27
BOOT2
Channel 2 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE2 pin and through a diode
to VCC (cathode vs. boot).
25
28
UGATE2
Channel 2 HS driver output.
A little series resistor helps in reducing device-dissipated power.
26
29
PHASE2
Channel 2 HS driver return path. It must be connected to the HS2 mosfet source
and provides the return path for the HS driver of channel 2.
27
30
LGATE2
Channel 2 LS driver output.
A little series resistor helps in reducing device-dissipated power.
28
31,
32
PGND
LS drivers return path.
This pin is common to both sections and it must be connected through the
closest path to the LS mosfets source pins in order to reduce the noise injection
into the device.
PAD
THERMAL
PAD
Thermal pad connects the silicon substrate and makes a good thermal contact
with the PCB to dissipate the power necessary to drive the external
mosfets.Connect to the GND plane with several vias to improve thermal
conductivity.
PIN FUNCTION (continued)
N. (*)
Name
Description
SO
VFQFPN


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