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PCA9554 Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCA9554 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 20 page Philips Semiconductors Product data sheet PCA9554/PCA9554A 8-bit I2C and SMBus I/O port with interrupt 2004 Sep 30 7 Device address 01 0 0 A2 A1 A0 SLAVE ADDRESS su01669 FIXED HARDWARE SELECTABLE R/W Figure 5. PCA9554 address 01 1 1 A2 A1 A0 slave address su01418 fixed programmable R/W Figure 6. PCA9554A address Bus transactions Data is transmitted to the PCA9554/PCA9554A registers using the write mode as shown in Figures 7 and 8. Data is read from the PCA9554/PCA9554A registers using the read mode as shown in Figures 9 and 10. These devices do not implement an auto-increment function so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent. 12 SCL WRITE TO PORT DATA OUT FROM PORT 3 4 567 8 SDA S0 A A A 0 1 0 0 A2 A1 A0 DATA 1 slave address data to port start condition R/W acknowledge from slave acknowledge from slave acknowledge from slave tpv DATA 1 VALID su01421 9 1 00 0 0 00 0 command byte P Figure 7. WRITE to output port register 12 SCL 3 4 567 8 SDA S0 A A A 0 1 0 0 A2 A1 A0 DATA slave address data to register start condition R/W acknowledge from slave acknowledge from slave acknowledge from slave su01422 9 00 0 0 00 1 command byte 1/0 DATA TO REGISTER P Figure 8. WRITE to configuration or polarity inversion registers |
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Similar Description - PCA9554 |
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