BD81010MUV-E2 datasheet(5/22 Pages) ROHM

Part #	BD81010MUV-E2

Description	Gamma voltage generated IC with built-in DAC

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Manufacturer	ROHM [Rohm]

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TSZ02201-0313AAF00360-1-2

19.Feb.2016 Rev.001

www.rohm.com

TSZ22111・15・001

BD81010MUV

Electrical Characteristics (Unless otherwise noted, Ta25°C, VDD=3.3V, VCC=15.0V, VREFIN=5.0V )

Parameter

Symbol

Limit

Unit

Condition

MIN

TYP

MAX

【 Regulator (VDAC) 】

FB Voltage

VFB

0.492

0.500

0.508

V

Input Bias Current

IFB

-1.2

0.0

1.2

µA

VFB=0.60V

Current Capability

IO

10

50

-

mA

【 Gamma Amplifier 】

Sink Current Capability

Nch Side (AMP0)

IooA

-

-10.0

-6.6

mA

during REG0=3BBh (14.0V ) setting,

OUT0=15V input

Sink Current Capability

Nch Side (AMP1 to AMP12)

IooB

-

-30

-20

mA

during REG1 to REG12=199h (6.0V) setting,

OUT1to OUT12=7V input

Sink Current Capability

Nch Side (AMP13)

IooC

-

-60

-40

mA

during REG13=043h (1.0V) setting,

OUT13=2V input

Source Current Capability

Pch Side (AMP0)

IoiA

40

60

-

mA

during REG0=3BBh (14.0V) setting,

OUT0=13V input

Source Current Capability

Pch Side (AMP1 to AMP12)

IoiB

20

30

-

mA

during REG1 to REG12=199h (6.0V) setting,

OUT1to OUT12=5V

Source Current Capability

Pch Side (AMP13)

IoiC

6.6

10.0

-

mA

during REG13=043h (1.0V) setting,

OUT13=0V input

Load Stability (OUT0)

⊿VO-A

-

10

70

mV

IO=0mA to -30mA

REG0=199h (6.0V) setting

Load Stability

(OUT1 to OUT12)

⊿VO-B

-

10

70

mV

IO=-15mA to 15mA

REG1 to REG12=199h (6.0V) setting

Load Stability (OUT13)

⊿VO-C

-

10

70

mV

IO=0mA to 30mA

REG13=199h (6.0V) setting

MAX Output Voltage (OUT0)

VOH-A

VCC-0.20

VCC-0.10

-

V

IO=-30mA

MAX Output Voltage

(OUT1 to OUT12)

VOH-B

VCC-1.00

VCC-0.50

-

V

IO=-15mA

MAX Output Voltage (OUT13)

VOH-C

VCC-0.60

VCC-0.30

-

V

IO=-5mA

MIN Output Voltage (OUT0)

VOL-A

-

0.30

0.60

V

IO=5mA

MIN Output Voltage

(OUT1 to OUT12)

VOL-B

-

0.60

1.20

V

IO=15mA

MIN Output Voltage (OUT13)

VOL-C

-

0.10

0.20

V

IO=30mA

Slew Rate (AMP0)

SR-A

1

4

-

V/µsec OUT0=No-load

Slew Rate (AMP1 to OUT12)

SR-B

1

4

-

V/µsec OUT1 to OUT12= No-load

Slew Rate (AMP13)

SR-C

1

4

-

V/µsec OUT13= No-load

【 10 Bit DAC 】

Resolution

RES

-

10

-

Bit

Integral Non-linearity Error

(INL)

LE

-2

-

+2

LSB

00Ah to 3F5h is the allowable margin of

error against the ideal linear.

Differential Non-linearity Error

(DNL)

DLE

-2

-

+2

LSB

00Ah to 3F5h is the allowable margin of error

against the ideal increase of 1LSB.

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