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ADS1299IPAG Datasheet(PDF) 6 Page - Texas Instruments |
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ADS1299IPAG Datasheet(HTML) 6 Page - Texas Instruments |
6 / 79 page 6 ADS1299, ADS1299-4, ADS1299-6 SBAS499B – JULY 2012 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: ADS1299 ADS1299-4 ADS1299-6 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated Pin Functions (continued) PIN TYPE DESCRIPTION NAME NO. START 38 Digital input Synchronization signal to start or restart a conversion PWDN 35 Digital input Power-down, active low VCAP1 28 Analog output Analog bypass capacitor pin. Connect a 100-μF capacitor to AVSS. VCAP2 30 Analog output Analog bypass capacitor pin. Connect a 1-μF capacitor to AVSS. VCAP3 55 Analog output Analog bypass capacitor pin. Connect a parallel combination of 1-μF and 0.1-μF capacitors to AVSS. VCAP4 26 Analog output Analog bypass capacitor pin. Connect a 1-μF capacitor to AVSS. VREFN 25 Analog input Negative analog reference voltage. VREFP 24 Analog input/output Positive analog reference voltage. Connect a minimum 10-μF capacitor to VREFN. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input pins are diode-clamped to the power-supply rails. Limit the input current to 10 mA or less if the analog input voltage exceeds AVDD + 0.3 V or is less than AVSS – 0.3 V, or if the digital input voltage exceeds DVDD + 0.3 V or is less than DGND – 0.3 V. 7 Specifications 7.1 Absolute Maximum Ratings (1) MIN MAX UNIT Voltage AVDD to AVSS –0.3 5.5 V DVDD to DGND –0.3 3.9 AVSS to DGND –3 0.2 VREFP to AVSS –0.3 AVDD + 0.3 VREFN to AVSS –0.3 AVDD + 0.3 Analog input AVSS – 0.3 AVDD + 0.3 Digital input DGND – 0.3 DVDD + 0.3 Current Input, continuous, any pin except power supply pins(2) –10 10 mA Temperature Maximum junction, TJ 150 °C Storage, Tstg –60 150 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 |
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