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OMAP3503DCUS72 Datasheet(PDF) 2 Page - Texas Instruments |
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OMAP3503DCUS72 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 264 page OMAP3515, OMAP3503 SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013 www.ti.com • HD Maximum Resolution – Three Master and Slave High-Speed Inter- Integrated Circuit (I2C) Controllers • Supports Up to 2 LCD Panels • Removable Media Interfaces: • Support for Remote Frame Buffer Interface (RFBI) LCD Panels – Three Multimedia Card (MMC)/Secure Digital (SD) with Secure Data I/O (SDIO) – 2 10-Bit Digital-to-Analog Converters (DACs) Supporting: • Comprehensive Power, Reset, and Clock Management • Composite NTSC and PAL Video – SmartReflex™ Technology • Luma and Chroma Separate Video (S- Video) – Dynamic Voltage and Frequency Scaling (DVFS) – Rotation 90-, 180-, and 270-Degrees • Test Interfaces – Resize Images From 1/4x to 8x – IEEE 1149.1 (JTAG) Boundary-Scan – Color Space Converter Compatible – 8-Bit Alpha Blending – ETM Interface • Serial Communication – Serial Data Transport Interface (SDTI) – 5 Multichannel Buffered Serial Ports • 12 32-Bit General-Purpose Timers (McBSPs) • 2 32-Bit Watchdog Timers • 512-Byte Transmit and Receive Buffer (McBSP1, McBSP3, McBSP4, and • 1 32-Bit 32-kHz Sync Timer McBSP5) • Up to 188 General-Purpose I/O (GPIO) Pins • 5-KB Transmit and Receive Buffer (Multiplexed with Other Device Functions) (McBSP2) • 65-nm CMOS Technologies • SIDETONE Core Support (McBSP2 and • Package-On-Package (POP) Implementation for McBSP3 Only) For Filter, Gain, and Mix Memory Stacking (Not Available in CUS Operations Package) • Direct Interface to I2S and PCM Device • Discrete Memory Interface (Not Available in and TDM Buses CBC Package) • 128-Channel Transmit and Receive Mode • Packages: – Four Master or Slave Multichannel Serial – 515-pin s-PBGA Package (CBB Suffix), Port Interface (McSPI) Ports .5-mm Ball Pitch (Top), .4-mm Ball Pitch – High-, Full-, and Low-Speed USB OTG (Bottom) Subsystem (12- and 8-Pin ULPI Interface) – 515-pin s-PBGA Package (CBC Suffix), – High-, Full-, and Low-Speed Multiport USB .65-mm Ball Pitch (Top), .5-mm Ball Pitch Host Subsystem (Bottom) • 12- and 8-Pin ULPI Interface or 6-, 4-, and – 423-pin s-PBGA Package (CUS Suffix), 3-Pin Serial Interface .65-mm Ball Pitch • Supports Transceiverless Link Logic • 1.8-V I/O and 3.0-V (MMC1 Only), (TLL) 0.985-V to 1.35-V Adaptive Processor Core Voltage – One HDQ™/1-Wire® Interface 0.985-V to 1.35-V Adaptive Core Logic Voltage – Three UARTs (One with Infrared Data Note: These are default Operating Performance Association [IrDA] and Consumer Infrared Point (OPP) voltages and could be optimized to [CIR] Modes) lower values using SmartReflex AVS. 1.2 Applications • Portable Navigation Devices • Portable Media Player • Digital Video Camera • Portable Data Collection • Point-of-Sale Devices • Gaming • Web Tablet • Smart White Goods • Smart Home Controllers 2 OMAP3515 and OMAP3503 Applications Processors Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: OMAP3515 OMAP3503 |
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