TLV5638EP

2.7V TO 5.5V LOW POWER DUAL 12BIT DIGITALTOANALOG

CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN

SGLS130B − JULY 2002 − REVISED DECEMBER 2003

5

POST OFFICE BOX 655303

(unless otherwise noted) (continued)

output specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VO

Output voltage

RL = 10 kΩ

0

VDD−0.4

V

Output load regulation accuracy

VO = 4.096 V, 2.048 V,

RL = 2 kΩ

±0.25

% full

scale V

reference pin configured as output (REF)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Vref(OUTL)

Low reference voltage

1.003

1.024

1.045

V

Vref(OUTH)

High reference voltage

VDD > 4.75 V

2.027

2.048

2.069

V

Iref(source)

Output source current

1

mA

Iref(sink)

Output sink current

−1

mA

Load capacitance

100

pF

PSRR

Power supply rejection ratio

−65

dB

reference pin configured as input (REF)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VI

Input voltage

0

VDD−1.5

V

RI

Input resistance

10

M

Ω

CI

Input capacitance

5

pF

Reference input bandwidth

REF = 0.2 Vpp + 1.024 V dc

Fast

1.3

MHz

Reference input bandwidth

REF = 0.2 Vpp + 1.024 V dc

Slow

525

kHz

Reference feedthrough

REF = 1 Vpp at 1 kHz + 1.024 V dc (see Note 10)

−80

dB

NOTE 11: Reference feedthrough is measured at the DAC output with an input code = 0x000.

digital inputs

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level digital input current

VI = VDD

1

µA

IIL

Low-level digital input current

VI = 0 V

−1

µA

Ci

Input capacitance

8

pF