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A6217KEJTR-J Datasheet(PDF) 2 Page - Allegro MicroSystems |
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A6217KEJTR-J Datasheet(HTML) 2 Page - Allegro MicroSystems |
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2 / 19 page  Automotive-Grade, Constant-Current PWM Dimmable Buck Regulator LED Driver A6217 and A6217-1 2 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Unit Supply Voltage VIN –0.3 to 50 V Bootstrap Drive Voltage VBOOT –0.3 to VIN+8 V Switching Voltage VSW –1.5 to VIN+0.3 V Linear Regulator Terminal VCC VCC to GND –0.3 to 7 V Enable and TON Voltage VEN, VTON –0.3 to VIN+0.3 V Current Sense Voltage VCS –0.3 to 7 V Maximum Junction Temperature TJ(max) 150 ºC Storage Temperature Tstg –55 to 150 ºC SELECTION GUIDE Part Number Maximum Output Current (A) Package Packing A6217KEJTR-J 3 Wettable flank 10-pin DFN with exposed thermal pad Contact Factory A6217KEJTR-1-J 1.5 Wettable flank 10-pin DFN with exposed thermal pad Contact Factory A6217KLJTR-T 3 8-pin SOICN with exposed thermal pad 3000 pieces per 13-in. reel A6217KLJTR-1-T 1.5 8-pin SOICN with exposed thermal pad 3000 pieces per 13-in. reel Pinout Diagrams Terminal List Table Number Name Function EJ LJ 1, 2 1 VIN Supply voltage input terminals 3 2 TON Regulator on-time setting resistor terminal; determines the switching frequency of the converter 4 3 EN Input for Enable and PWM dimming; rated up to VIN and logic-level compatible 5 4 CS Drive output current sense feedback 6 5 VCC Internal linear regulator output; add filter capacitor of 0.1 µF from this pin to GND 7 6 GND Ground terminal 8 7 BOOT DMOS gate driver bootstrap terminal 9, 10 8 SW Switched output terminals – – PAD Exposed pad for enhanced thermal dissipation; connect to GND THERMAL CHARACTERISTICS*: May require derating at maximum conditions; see application section for optimization Characteristic Symbol Test Conditions* Value Unit Package Thermal Resistance (Junction to Ambient) RθJA DFN-10 (EJ) package on 4-layer PCB based on JEDEC standard 45 ºC/W SOICN-8 (LJ) package on 4-layer PCB based on JEDEC standard 35 ºC/W Package Thermal Resistance (Junction to Pad) RθJP 2 ºC/W *Additional thermal information available on the Allegro™ website. 10 9 8 7 6 SW SW BOOT PAD GND VCC 1 2 3 4 5 VIN VIN TON EN CS Package EJ Pinouts SW BOOT GND VCC VIN TON EN CS 1 2 3 4 8 7 6 5 PAD Package LJ Pinouts |
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