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A6274-1 Datasheet(PDF) 7 Page - Allegro MicroSystems |
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A6274-1 Datasheet(HTML) 7 Page - Allegro MicroSystems |
7 / 24 page Linear Current Regulator and Controller for Automotive LED Arrays A6274, A6274-1 A6284, A6284-1 7 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Characteristics Symbol Test Conditions Min. Typ. Max. Unit LOGIC SIGNAL SPECIFICATIONS FFn Output (Open Drain) VFFn(L) IFFn = 1 mA, fault asserted – – 0.4 V FFn Output Leakage Current1 IFFn(LKG) VFFn = 12 V, fault not asserted –1 – 1 µA PWMIN, ENx Low Voltage VLOGIC(L) ● – – 0.8 V PWMIN, ENx High Voltage VLOGIC(H) ● 2 – – V FFn Input Low Voltage VFFLOGIC(L) MODE = 1; FFn pin acts as bidirectional pin when MODE = 1 ● – – 0.8 V FFn Input High Voltage VFFLOGIC(H) ● 2.1 – – V PWMIN Input Hysteresis VLOGIC(HYS) 150 270 – mV ENx Input Hysteresis VLOGIC(HYS1) 40 – – mV ENx Internal Pull-Down Resistance RPD(ENx) − 200 − kΩ COMP SPECIFICATIONS COMP Source Current ICOMP(SOURCE) − 320 − µA COMP Sink Current2 ICOMP(SINK) − –320 − µA COMP Startup Sinking Current ICOMP(START) VLEDx is < regulation voltage − 2 − mA 1 For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), and positive current is defined as going into the node or pin (sinking). 2 Ensured by design and characterization, not production tested. 2a Max limit ensured by design and characterization, not production tested. 3 LED accuracy is defined for A6274 as |[1 – (RISETx × ILED(avg) ÷ 298)]| and for A6284 as |[1 – (RISETx × ILED(avg) ÷ 590)]|, where ILED(avg) is the average of ILED1 through ILED6, RISETx is in kΩ, and ILED is in mA. 4 LED current matching is defined as [(ILEDx – ILED(avg)) ÷ ILED(avg)], with ILED(avg) as defined in Footnote 3. ELECTRICAL CHARACTERISTICS (continued): Valid at VIN = 14 V, VENx = 3.3 V; ● indicates specifications across the full operating tempera- ture range with TJ = –40°C to 150°C; other specifications are at TJ = 25°C, unless noted otherwise. Refer to Figure 1 for typical application circuit. |
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