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MTV012E Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part # MTV012E
Description  8051 Embedded CRT Monitor Controller OTP Version
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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MYSON
TECHNOLOGY
MTV012E
MTV012E Revision 1.2 12/23/1998
4/14
DA11E = 1
→ Pin #27 is DA11.
= 0
→ Pin #27 is P2.6.
DA10E = 1
→ Pin #28 is DA10.
= 0
→ Pin #28 is P2.7.
* SINT0 should be 0 in this case.
2. External Special Function Registers (XFR)
The XFR is a group of registers allocated in the 8051 external RAM area. Most of the registers are used
for monitor control or PWM DAC. The program can initialize Ri value and use "MOVX" instruction to
access these registers.
3. PWM DAC
Each D/A converter's output pulse width is controlled by an 8-bit register in the XFR. The frequency of
these outputs is (Xtal frequency)/253 or (Xtal frequency)/256, selected by DIV253. If DIV253=1, writing
FDH/FEH/FFH to the DAC register generates a stable high output. If DIV253=0, the output will pulse low
at least once even if the DAC register's content is FFH. Writing 00H to the DAC register generates stable
low output.
reg name
addr
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
DA0
20h (r/w)
DA0b7
DA0b6
DA0b5
DA0b4
DA0b3
DA0b2
DA0b1
DA0b0
DA1
21h (r/w)
DA1b7
DA1b6
DA1b5
DA1b4
DA1b3
DA1b2
DA1b1
DA1b0
DA2
22h (r/w)
DA2b7
DA2b6
DA2b5
DA2b4
DA2b3
DA2b2
DA2b1
DA2b0
DA3
23h (r/w)
DA3b7
DA3b6
DA3b5
DA3b4
DA3b3
DA3b2
DA3b1
DA3b0
DA4
24h (r/w)
DA4b7
DA4b6
DA4b5
DA4b4
DA4b3
DA4b2
DA4b1
DA4b0
DA5
25h (r/w)
DA5b7
DA5b6
DA5b5
DA5b4
DA5b3
DA5b2
DA5b1
DA5b0
DA6
26h (r/w)
DA6b7
DA6b6
DA6b5
DA6b4
DA6b3
DA6b2
DA6b1
DA6b0
DA7
27h (r/w)
DA7b7
DA7b6
DA7b5
DA7b4
DA7b3
DA7b2
DA7b1
DA7b0
DA8
28h (r/w)
DA8b7
DA8b6
DA8b5
DA8b4
DA8b3
DA8b2
DA8b1
DA8b0
DA9
29h (r/w)
DA9b7
DA9b6
DA9b5
DA9b4
DA9b3
DA9b2
DA9b1
DA9b0
DA10
2Ah (r/w)
DA10b7
DA10b6
DA10b5
DA10b4
DA10b3
DA10b2
DA10b1
DA10b0
DA11
2Bh (r/w)
DA11b7
DA11b6
DA11b5
DA11b4
DA11b3
DA11b2
DA11b1
DA11b0
DA12
2Ch (r/w)
DA12b7
DA12b6
DA12b5
DA12b4
DA12b3
DA12b2
DA12b1
DA12b0
DA13
2Dh (r/w)
DA13b7
DA13b6
DA13b5
DA13b4
DA13b3
DA13b2
DA13b1
DA13b0
WDT
80h
WEN
WCLR
CLRDDC
DIV253
X
WDT2
WDT1
WDT0
DA0 (r/w) :
The output pulse width control for DA0.
DA1 (r/w) :
The output pulse width control for DA1.
DA2 (r/w) :
The output pulse width control for DA2.
DA3 (r/w) :
The output pulse width control for DA3.
DA4 (r/w) :
The output pulse width control for DA4.
DA5 (r/w) :
The output pulse width control for DA5.
DA6 (r/w) :
The output pulse width control for DA6.
DA7 (r/w) :
The output pulse width control for DA7.
DA8 (r/w) :
The output pulse width control for DA8.
DA9 (r/w) :
The output pulse width control for DA9.
DA10 (r/w) :
The output pulse width control for DA10.
DA11 (r/w) :
The output pulse width control for DA11.
DA12 (r/w) :
The output pulse width control for DA12.
DA13 (r/w) :
The output pulse width control for DA13.
WDT (w) :
Watchdog timer & special control bit.
DIV253 = 1
→ The PWM DAC output frequency is (Xtal frequency)/253.
= 0
→ The PWM DAC output frequency is (Xtal frequency)/256.
*1. All D/A converters are centered with value 80h after power-on.


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