NCP1500

http://onsemi.com

8

Over Voltage Protection

NCP1500 has an overvoltage protection circuit that

protects the output during the PWM mode. Normally, in

PWM mode, the output switch will conduct at the onset of

every synchronization pulse. The minimum output duty

cycle is 3%. The output voltage will rise at minimum duty

cycle and a light load or no load condition is present at the

output. If the output rises more than 5% of the programmed

voltage, an overvoltage comparator will trip. This signal will

reset the PWM latch and hold it in a reset condition until the

output voltage decays below its threshold. The output will

then be allowed to switch at the next synchronization pulse.

This type of operation is usually referred to as PFM or skip

mode operation.

The following figure is a simulation of the regulator

during this condition:

Figure 6. Waveforms of PFM Mode Operation During Over Voltage

0.0

175.00000

181.33333

187.66667

194.00000

200.33333

206.66667

213.00000

Main FET Current

Diode Current

Gate Voltage for Switching FET

2.0

4.0

1.05010

1.05080

1.05150

−500 m

1.75

4.00

−100 m

25.0 m

150 m

−10 m

20 m

10 m

0.0

−1.000 m

124.5 m

250.0 m

3.5960

3.6000

3.6040

TIME

(m)