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SN74AUCH245RGYR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AUCH245RGYR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 6 page SN74AUCH245 OCTAL BUS TRANSCEIVER WITH 3STATE OUTPUTS SCES420 – JANUARY 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Partial-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 2 ns at 1.8 V D Low Power Consumption, 20-µA Max ICC D ±8-mA Output Drive at 1.8 V D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) description/ordering information This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING –40 °C to 85°C QFN – RGY Tape and reel SN74AUCH245RGYR MT245 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. RGY PACKAGE (TOP VIEW) 120 10 11 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12 OE B1 B2 B3 B4 B5 B6 B7 A1 A2 A3 A4 A5 A6 A7 A8 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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