MC100LVEP210 datasheet(2/9 Pages) ONSEMI

Part #	MC100LVEP210

Description	2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver

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Manufacturer	ONSEMI [ON Semiconductor]

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MC100LVEP210

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CLKn*, CLKn**

ECL/PECL/HSTL CLK Inputs

VBB

Reference Voltage Output

VCC Qb4 Qb4 Qb3 Qb3 Qb2 Qb2 VCC

VCC Qa0 Qa0 Qa1 Qa1 Qa2 Qa2 VCC

VEE

VBB

VCC

Qb1

Qb0

Qa4

Qa3

Qa0

Qa1

Qa2

Qa3

Qa4

VBB

CLKa

NC

Qb0

Qb1

Qb2

Qb3

Qb4

CLKb

Warning: All VCC and VEE pins must be externally connected

to Power Supply to guarantee proper operation.

Qn0:4, Qn0:4

ECL/PECL Outputs

FUNCTION

VCC

Positive Supply

VEE

Negative Supply

* Pins will default LOW when left open.

** Pins will default to VCC/2 when left open.

MC100LVEP210

CLKa

CLKb

VEE

VCC

Table 1. PIN DESCRIPTION

25

26

27

28

29

30

31

32

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

16

Figure 1. 32−Lead QFN Pinout (Top View)

MC100LVEP210

VCC Qb4 Qb4 Qb3 Qb3 Qb2 Qb2 VCC

VCC Qa0 Qa0 Qa1 Qa1 Qa2 Qa2 VCC

VEE

VBB

VCC

Qb1

Qb0

Qa4

Qa3

NC

CLKa

CLKb

Figure 2. LQFP−32 Pinout (Top View)

Figure 3. Logic Diagram

EP

The exposed pad (EP) on the QFN−32 package bottom is thermally connected to the die for im-

proved heat transfer out of the package. THe exposed pad must be attached to a heat−sinking

conduit. The pad is electrically connected to VEE.

Exposed Pad

(EP)

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