TMS626812

1048576 BY 8-BIT BY 2-BANK

SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY

SMOS687A –JULY 1996 – REVISED APRIL 1997

3

POST OFFICE BOX 1443

operation (continued)

COMMAND‡

STATE OF

BANK(S)

CS

RAS

CAS

W

A11

A10

A9 – A0

MNEMONIC

Mode register set

T = deac

B = deac

L

L

L

L

X

X

A9 = V

A8 – A7 = 0

A6 – A0 = V

MRS

Bank deactivate (precharge)

X

L

L

H

L

BS

L

X

DEAC

Deactivate all banks

X

L

L

H

L

X

H

X

DCAB

Bank activate / row-address entry

SB = deac

L

L

H

H

BS

V

V

ACTV

Column-address entry / write operation

SB = actv

L

H

L

L

BS

L

V

WRT

Column-address entry / write operation

with automatic deactivate

SB = actv

L

H

L

L

BS

H

V

WRT-P

Column-address entry / read operation

SB = actv

L

H

L

H

BS

L

V

READ

Column-address entry / read operation

with automatic deactivate

SB = actv

L

H

L

H

BS

H

V

READ-P

No operation

X

L

H

H

H

X

X

X

NOOP

Control-input inhibit / no operation

X

H

X

X

X

X

X

X

DESL

Auto-refresh§

T = deac

B = deac

L

L

L

H

X

X

X

REFR

† For exception of these commands on cycle n:

– CKE(n–1) must be high, or

– tCESP must be satisfied for power-down exit, or

– tCESP and tRC must be satisfied for self-refresh exit, or

– tCES and nCLE must be satisfied for clock-suspend exit.

DQM(n) is a don’t care.

‡ All other unlisted commands are considered vendor-reserved commands or illegal commands.

§ Auto-refresh or self-refresh entry requires that all banks be deactivated or in an idle state prior to the command entry.

Legend:

n

= CLK cycle number

L

= Logic low

H

= Logic high

X

= Don’t care, either logic low or logic high

V

= Valid

T

= Bank T

B

= Bank B

actv

= Activated

deac = Deactivated

BS

= Logic high to select bank T; logic low to select bank B

SB

= Bank selected by A11 at cycle n