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66AK2G02 Datasheet(PDF) 1 Page - Texas Instruments |
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66AK2G02 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 230 page  Product Folder Sample & Buy Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. 66AK2G02, 66AK2G01 SPRS932C – DECEMBER 2015 – REVISED NOVEMBER 2016 66AK2G0x Multicore DSP+ARM KeyStone II System-on-Chip (SoC) 1 Device Overview 1 1.1 Features 1 • Processor Cores: • ARM® Cortex®-A15 Microprocessor Unit (ARM A15) Subsystem at up to 600 MHz – Supports Full Implementation of ARMv7-A Architecture Instruction Set – Integrated SIMDv2 ( NEON™ Technology) and VFPv4 (Vector Floating Point) – 32KB of L1 Program Memory – 32KB of L1 Data Memory – 512KB of L2 Memory – Error Correction Code (ECC) Protection for L1 Data Memory ECC for L2 Memory – Parity Protection for L1 Program Memory – Global Timebase Counter (GTC) – 64-Bit Free-Running Counter That Provides Timebase for ARM A15 Internal Timers – Compliant to ARM V7 MPCore Architecture for Generic Timers • C66x Fixed- and Floating-Point VLIW DSP Subsystem at up to 600 MHz – Fully Object-Code Compatible With C67x+ and C64x+ Cores – 32KB of L1 Program Memory – 32KB of L1 Data Memory – 1024KB of L2 Configurable as L2 RAM or Cache – Error Detection for L1 Program Memory – ECC for L1 Data Memory – ECC for L2 Data Memory • Industrial Subsystem: • Up to Two Programmable Real-Time Unit and Industrial Communication Subsystems (PRU- ICSS), Each Supports: – Two Programmable Real-Time Units (PRUs) With Enhanced Multiplier and Accumulator, Each PRU Supports: – 16KB of Program Memory With ECC – 8KB of Data Memory With ECC – CRC32 and CRC16 Hardware Accelerator – 20 × Enhanced GPIO – Serial Capture Unit (SCU), Supporting Direct Connection, 16-bit Parallel Capture, 28-bit Shift, MII_RT, EnDat 2.2 Protocol and Sigma- Delta Demodulation – Scratch Pad and XFR Direct Connect – 64KB of General-Purpose Memory With ECC – One Ethernet MII_RT Module with Two MII Ports Configurable for Connection With Each PRU; Support Multiple Industrial Communication Protocols – Industrial Ethernet Peripheral (IEP) to Manage and Generate Industrial Ethernet Functions – Built-In Universal Asynchronous Receiver and Transmitter (UART) 16550, With a Dedicated 192-MHz Clock to Support 12-Mbps PROFIBUS® – Built-In Industrial Ethernet 64-Bit Timer – Built-In Enhanced Capture Module (eCAP) • Memory Subsystem: • Multicore Shared Memory Controller (MSMC) With 1024KB of Shared L2 RAM – Provides High-Performance Interconnect to Internal Shared SRAM and DDR EMIF for Both ARM A15 and C66x Access – Supports ARM I/O Coherency Where ARM A15 is Cache Coherent to Other System Masters Accessing the MSMC-SRAM or DDR EMIF – Supports ECC on SRAM • Up to 36-Bit DDR3L External Memory Interface (EMIF) – Supports DDR3L at up to 800 MT/s – Supports 4-GB Memory Address Range – Supports 32-Bit SDRAM Data Bus With 4-bit ECC – Supports 16-Bit and 32-Bit SDRAM Data Bus Without ECC • General-Purpose Memory Controller (GPMC) – Flexible 8- and 16-Bit Asynchronous Memory Interface With up to Four Chip Selects – Supports NAND, NOR, Muxed-NOR, SRAM – Supports General-Purpose Memory-Port Expansion With the Following Modes: – Asynchronous Read and Write Access – Asynchronous Read Page Access (4-, 8-, 16- Word16) – Synchronous Read and Write Access – Synchronous Read Burst Access Without Wrap Capability (4-, 8-, 16-Word16) – Up to 16-Bit ECC Support for NAND Flash Using BCH Code (t = 4, 8, or 16) or Hamming Code |
Similar Part No. - 66AK2G02_16 |
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Similar Description - 66AK2G02_16 |
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