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66AK2G02 Datasheet(PDF) 2 Page - Texas Instruments |
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66AK2G02 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 230 page  2 66AK2G02, 66AK2G01 SPRS932C – DECEMBER 2015 – REVISED NOVEMBER 2016 www.ti.com Submit Documentation Feedback Product Folder Links: 66AK2G02 66AK2G01 Device Overview Copyright © 2015–2016, Texas Instruments Incorporated • Error Location Module (ELM) – Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm – Supports 4-Bit, 8-Bit and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms – Provides ECC Calculation (Up to 16 bits) for NAND Support • Network Subsystem (NSS): • Ethernet MAC Subsystem (EMAC) – One-Port Gigabit Ethernet: RMII, MII, RGMII – Supports 10-, 100-, 1000-Mbps Full Duplex – Supports 10-, 100-Mbps Half Duplex – Supports Ethernet Audio Video Bridging (eAVB) – Maximum Frame Size 2016 Bytes (2020 Bytes With VLAN) – Eight Priority Level QOS Support (802.1p) – IEEE 1588v2 (2008 Annex D, Annex E, and Annex F) to Facilitate Audio Video Bridging 802.1AS Precision Time Protocol – CPTS Module With Timestamping Support for IEEE 1588v2 – DSCP Priority Mapping (IPv4 and IPv6) – MDIO Module for PHY Management – Enhanced Statistics Collection • Navigator Subsystem (NAVSS) – Built-In Packet DMA Controller for Optimized Network Processing – Built-In Queue Manager (QM) for Optimized Network Processing – Supports up to 128 Queues – 2048 Buffers Supported in Internal Queue RAM • Crypto Engine (SA) Supports: – Crypto Function Library for AES, DES, 3DES, SHA1, MD5, SHA2-224 and SHA2-256 Operations – Block Data Encryption Supported Through Hardware Cores – AES With 128-, 192-, and 256-Bit Key Supports – DES and 3DES With 1, 2, or 3 Different Key Support – Programmable Mode Control Engine (MCE) – Public Key Accelerator (PKA) With Elliptic Curve Cryptography – Elliptic Curve Diffie–Hellman (ECDH) Based Key Exchange and Digital Signature (ECDSA) Applications – Authentication for SHA1, MD5, SHA2-224 and SHA2-256 – Keyed HMAC Operation Through Hardware Core – True Random Number Generator (TRNG) • Display Subsystem: • Supports One Video Pipe With In-Loop Scaling, Color Space • Conversion and Background Color Overlay • Input Data Format: BITMAP, RGB16, RGB24, RGB32, ARGB16, ARGB32, YUV420, YUV422, and RGB565-A8 • Supported Display Interfaces: – MIPI® DPI 2.0 Parallel Interface – RFBI (MIPI-DBI 2.0) up to QVGA at 30fps – BT.656 4:2:2 – BT.1120 4:2:2 up to 1920 × 1080 at 30fps • In-Loop Scaling Capability • LCD Display Interface Supports: – Active Matrix (TFT) – Passive Matrix (STN) – Grayscale – TDM – AC Bias Control – Dither – CPR • High-Speed Serial Interfaces: • PCI Express® 2.0 Port with Integrated PHY: – Single Lane Gen2-Compliant Port – Root Complex (RC) and End Point (EP) Modes • Up to Two USB 2.0 High-Speed Dual-Role Ports With Integrated PHYs, Support: – Dual-role-device (DRD) Capability With: – USB 2.0 Peripheral (or Device) at HS (480Mbps) and FS (12Mbps) Speeds – USB 2.0 Host at HS (480Mbps), FS (12Mbps), and LS (1.5Mbps) Speeds – USB 2.0 Static Peripheral and Static Host Operations – xHCI Controller With the Following Features: – Compatible to the xHCI Specification (revision 1.1) in Host Mode – All Modes of Transfer (Control, Bulk, Interrupt, and Isochronous) – 15 Transmit (TX), 15 Receive (RX) Endpoints (EPs), and One Bidirectional EP0 Endpoint • Flash Media Interfaces: • QSPI™ With XIP and up to Four Chip Selects, Supports: – Memory-Mapped Direct Mode of Operation for Performing FLASH Data Transfers and Executing Code From FLASH Memory (XIP) – Supports up to 96 MHz – Internal SRAM Buffer With ECC – High Speed Read Data Capture Mechanism |
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