EM6AA160TSC-4G datasheet(8/63 Pages) ETRON

Part #	EM6AA160TSC-4G

Description	16M x 16 bit DDR Synchronous DRAM (SDRAM)

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Manufacturer	ETRON [Etron Technology, Inc.]

Direct Link	http://www.etron.com

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EtronTech

EM6AA160

Etron Confidential

8

Rev. 1.3

Mar. /2014

• Addressing Mode Select Field (A3)

The Addressing Mode can be one of two modes, either Interleave Mode or Sequential Mode. Both Sequential

Mode and Interleave Mode support burst length of 2, 4 and 8.

Table 6. Addressing Mode

A3

Addressing Mode

0

Sequential

1

Interleave

• Burst Definition, Addressing Sequence of Sequential and Interleave Mode

Table 7. Burst Address ordering

Start Address

Burst Length

A2

A1

A0

Sequential

Interleave

X

0

0, 1

2

X

1

1, 0

X

0

0, 1, 2, 3

X

0

1

1, 2, 3, 0

1, 0, 3, 2

X

1

0

2, 3, 0, 1

4

X

1

3, 0, 1, 2

3, 2, 1, 0

0

0, 1, 2, 3, 4, 5, 6, 7

0

1

1, 2, 3, 4, 5, 6, 7, 0

1, 0, 3, 2, 5, 4, 7, 6

0

1

0

2, 3, 4, 5, 6, 7, 0, 1

2, 3, 0, 1, 6, 7, 4, 5

0

1

3, 4, 5, 6, 7, 0, 1, 2

3, 2, 1, 0, 7, 6, 5, 4

1

0

4, 5, 6, 7, 0, 1, 2, 3

1

0

1

5, 6, 7, 0, 1, 2, 3, 4

5, 4, 7, 6, 1, 0, 3, 2

1

0

6, 7, 0, 1, 2, 3, 4, 5

6, 7, 4, 5, 2, 3, 0, 1

8

1

7, 0, 1, 2, 3, 4, 5, 6

7, 6, 5, 4, 3, 2, 1, 0

• CAS Latency Field (A6~A4)

This field specifies the number of clock cycles from the assertion of the Read command to the first read data.

The minimum whole value of CAS Latency depends on the frequency of CK. The minimum whole value

satisfying the following formula must be programmed into this field.

tCAC(min)

≤ CAS Latency X tCK

Table 8. CAS Latency

A6

A5

A4

CAS Latency

0

Reserved

0

1

Reserved

0

1

0

2 clocks

0

1

3 clocks

1

0

Reserved

1

0

1

Reserved

1

0

2.5 clocks

1

Reserved

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