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TCA9548AMRGER Datasheet(PDF) 6 Page - Texas Instruments |
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TCA9548AMRGER Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 36 page  6 TCA9548A SCPS207F – MAY 2012 – REVISED NOVEMBER 2016 www.ti.com Product Folder Links: TCA9548A Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated Electrical Characteristics (1) (continued) VCC = 2.3 V to 3.6 V, over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP(2) MAX UNIT RON Switch-on resistance VO = 0.4 V, IO = 15 mA 4.5 V to 5.5 V 4 10 20 Ω 3 V to 3.6 V 5 12 30 VO = 0.4 V, IO = 10 mA 2.3 V to 2.7 V 7 15 45 1.65 V to 1.95 V 10 25 70 (1) A device internally must provide a hold time of at least 300 ns for the SDA signal (referred to the VIH min of the SCL signal), to bridge the undefined region of the falling edge of SCL. (2) Data taken using a 1-k Ω pull-up resistor and 50-pF load (see Figure 6) (3) Cb = total bus capacitance of one bus line in pF 6.6 I 2C Interface Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 5) MIN MAX UNIT STANDARD MODE fscl I2C clock frequency 0 100 kHz tsch I2C clock high time 4 μs tscl I2C clock low time 4.7 μs tsp I2C spike time 50 ns tsds I2C serial-data setup time 250 ns tsdh I2C serial-data hold time 0(1) μs ticr I2C input rise time 1000 ns ticf I2C input fall time 300 ns tocf I2C output (SDn) fall time (10-pF to 400-pF bus) 300 ns tbuf I2C bus free time between stop and start 4.7 μs tsts I2C start or repeated start condition setup 4.7 μs tsth I2C start or repeated start condition hold 4 μs tsps I2C stop condition setup 4 μs tvdL(Data) Valid-data time (high to low)(2) SCL low to SDA output low valid 1 μs tvdH(Data) Valid-data time (low to high)(2) SCL low to SDA output high valid 0.6 μs tvd(ack) Valid-data time of ACK condition ACK signal from SCL low to SDA output low 1 μs Cb I2C bus capacitive load 400 pF FAST MODE fscl I2C clock frequency 0 400 kHz tsch I2C clock high time 0.6 μs tscl I2C clock low time 1.3 μs tsp I2C spike time 50 ns tsds I2C serial-data setup time 100 ns tsdh I2C serial-data hold time 0(1) μs ticr I2C input rise time 20 + 0.1Cb (3) 300 ns ticf I2C input fall time 20 + 0.1Cb (3) 300 ns tocf I2C output (SDn) fall time (10-pF to 400-pF bus) 20 + 0.1Cb (3) 300 ns tbuf I2C bus free time between stop and start 1.3 μs tsts I2C start or repeated start condition setup 0.6 μs tsth I2C start or repeated start condition hold 0.6 μs tsps I2C stop condition setup 0.6 μs |
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