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MC14541BDG Datasheet(PDF) 1 Page - ON Semiconductor |
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MC14541BDG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. 14 1 Publication Order Number: MC14541B/D MC14541B Programmable Timer The MC14541B programmable timer consists of a 16−stage binary counter, an integrated oscillator for use with an external capacitor and two resistors, an automatic power−on reset circuit, and output control logic. Timing is initialized by turning on power, whereupon the power−on reset is enabled and initializes the counter, within the specified VDD range. With the power already on, an external reset pulse can be applied. Upon release of the initial reset command, the oscillator will oscillate with a frequency determined by the external RC network. The 16−stage counter divides the oscillator frequency (fosc) with the nth stage frequency being fosc/2n. Features • Available Outputs 28, 210, 213 or 216 • Increments on Positive Edge Clock Transitions • Built−in Low Power RC Oscillator (±2% accuracy over temperature range and ±20% supply and ±3% over processing at < 10 kHz) • Oscillator May Be Bypassed if External Clock Is Available (Apply external clock to Pin 3) • External Master Reset Totally Independent of Automatic Reset Operation • Operates as 2n Frequency Divider or Single Transition Timer • Q/Q Select Provides Output Logic Level Flexibility • Reset (auto or master) Disables Oscillator During Resetting to Provide No Active Power Dissipation • Clock Conditioning Circuit Permits Operation with Very Slow Clock Rise and Fall Times • Automatic Reset Initializes All Counters On Power Up • Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset Supply Voltage Range = Disabled (Pin 5 = VDD) Supply Voltage Range = 8.5 Vdc to 18 Vdc with Auto Reset Supply Voltage Range = Enabled (Pin 5 = VSS) • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant http://onsemi.com MARKING DIAGRAMS A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION SOIC−14 D SUFFIX CASE 751A TSSOP−14 DT SUFFIX CASE 948G 1 14 14541BG AWLYWW 14 541B ALYW G G 1 14 SOEIAJ−14 F SUFFIX CASE 965 1 14 MC14541B ALYWG (Note: Microdot may be in either location) PIN ASSIGNMENT NC = NO CONNECTION 11 12 13 14 8 9 10 5 4 3 2 1 7 6 MODE NC A B VDD Q Q/Q SEL NC RS Ctc Rtc VSS MR AR SOIC−14 TSSOP−14 SOEIAJ−14 |
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