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TSZ22111

• 15 • 001

10/19

TSZ02201-0P5P0BK00810-1-2

04.Dec.2014 Rev.001

BD8205EFV-M

Timing Chart

1. Kind of the signals

・External power supply

： POWVCC1, POWVCC2

・Internal power supply

： VREG

・Reference voltage input

： BIAS

・Driver input

： IN1, IN2, IN3, IN4, IN5

・Mute control input

： MUTE1245, MUTE3

・Driver output

： VO1P, VO1M, VO2P, VO2M, VO3P, VO3M, VO4P, VO4M, VO5P, VO5M,

2. Start-up Sequence

(1) Input external power supply. The slew

rate recommends less than 0.045V/μs in the start-up before the power supply

voltage arrive at 5V. When the power supply voltage quickly start-up, an overshoot of the VREG voltage occurs and

may lead to internal element destruction. Keep relations of POWVCC1 >= POWVCC2 at the start-up.

(2) Input reference voltage (BIAS). Because BIAS is sequence-free, BIAS input before the external power supply at

start-up is possible.

(3) After the POWVCC1 power supply voltage arrived at 4.0V (UVLO release voltage), input the mute control.

(4) After input the mute control, input any voltage into each driver input.

0V

POWVCC1, POWVCC2 : 8V

VREG : 5V(Typ)

Pin voltage

BIAS

MUTE1245, 3

Driver output

1.65V

0V

3.3V

OFF

ACTIVE

time

0V

UVLO release

4.0V(Typ)

Input MUTE after UVLO and

BIAS drop mute release

BIAS drop mute

release 0.7V(Typ)

Slew rate

0.045V/

μs or more slowly

Equal to BIAS

or Hi-Z input

Input any voltage

Driver input

Figure 13. Example of start-up sequence