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BU64241GWZ Datasheet(PDF) 7 Page - Rohm |
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BU64241GWZ Datasheet(HTML) 7 Page - Rohm |
7 / 24 page Datasheet Datasheet 7/20 BU64241GWZ © 2012 ROHM Co., Ltd. All rights reserved. 01. Jul. 2013 Rev.004 www.rohm.com TSZ22111・15・001 TSZ02201-0H2H0B600460-1-2 ●2-wire serial BUS Format (Fast mode SCL = 400 kHz) ●Register Update Timing PS – Register is updated during the 2 nd ACK response during a 3 byte 2-wire serial command EN – Register is updated during the 3 rd ACK response during a 3 byte 2-wire serial command Wx – Register is updated during the 2 nd ACK response during a 3 byte 2-wire serial command M – Register is updated during the 3 rd ACK response during a 3 byte 2-wire serial command Dx – Register is updated during the 3 rd ACK response during a 3 byte 2-wire serial command Note: Setting the external power save pin = VPSL (typically 0 V) will reset all 2-wire serial registers to 0 Register name Setting item Description R/W Read/Write mode 0 = Write mode (0x18 address), 1 = Read mode (0x19 address) PS Serial power save 0 = Driver in standby mode, 1 = Driver in operating mode EN Driver output status 0 = Output is Hi-Z 1 = Constant current sink/sequence start M Mode select M=0=ISRC mode disabled M=1=ISRC mode enabled W2W1W0 Register address 000b = Output current setting 001b = Parameter setting 1 010b = Parameter setting 2 011b = Parameter setting 3 100b = Parameter setting 4 D9 to D0 Data bits Register data Write mode(R/W = 0) Output from Master Output from Slave S 00 01100 R/W APS EN W2 W1 W0 M D9 D8 A D7 D6 D5 D4 D3 D2 D1 D0 A Read mode S 00 011000 A PS EN W2 W1 W0 M ※※ A S 00 011001 A PS EN W2 W1 W0 M CD9 CD8 A CD7 CD6 CD5 CD4 CD3 CD2 CD1 CD0 nA S : start signal P : stop signal A : acknowledge nA : non acknowledge ※ : Don't care Update Read Write Update W (register address) |
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