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TSZ02201-0K1K0B601860-1-2

© 2016 ROHM Co., Ltd. All rights reserved.

6. Oct.2016 Rev.003

www.rohm.com

TSZ22111・15・001

BU64985GWZ

Controlling Step Mode

Step mode is the control period in which the lens is moved by small output current steps. During step mode it is possible

to control the step resolution and step time in order to generate just enough output current to float the lens with minimal

ringing effects. Ringing can be better controlled by choosing a large value for the step time and a small value for the

step resolution with the trade off of a greater settling time. The step time and step resolution should be chosen depending

on the acceptable system limits of ringing vs. settling time.

Step mode is used when M=1, the reference DAC set to 0, and the present DAC code is in between point A and point B.

Typically this mode is only used during ISRC operation between point A and B, however it is possible to move the lens to

point C using only step mode if point C is set such that point C is only 1 DAC code greater than point B.

Step mode is controlled by the 5-bit step time, stt[4:0], and 3-bit step resolution, str[2:0], values stored in register W[2:0]

= 0b111. The step time is set by the 5 LSBs and the step resolution is set by the 3 MSBs of the third byte write while

using register W[2:0] = 0b111.

Table 5. Step Time Settings

stt[4:0]

Step Time

stt[4:0]

Step Time

stt[4:0]

Step Time

stt[4:0]

Step Time

0b00000

-

0b01000

400 µs

0b10000

800 µs

0b11000

1200 µs

0b00001

50 µs

0b01001

450 µs

0b10001

850 µs

0b11001

1250 µs

0b00010

100 µs

0b01010

500 µs

0b10010

900 µs

0b11010

1300 µs

0b00011

150 µs

0b01011

550 µs

0b10011

950 µs

0b11011

1350 µs

0b00100

200 µs

0b01100

600 µs

0b10100

1000 µs

0b11100

1400 µs

0b00101

250 µs

0b01101

650 µs

0b10101

1050 µs

0b11101

1450 µs

0b00110

300 µs

0b01110

700 µs

0b10110

1100 µs

0b11110

1500 µs

0b00111

350 µs

0b01111

750 µs

0b10111

1150 µs

0b11111

1550 µs

Table 6. Step Resolution Settings

str[2:0]

Step

Resolution

str[2:0]

Step

Resolution

str[2:0]

Step

Resolution

str[2:0]

Step

Resolution

0b000

-

0b010

2 LSB

0b100

4 LSB

0b110

6 LSB

0b001

1 LSB

0b011

3 LSB

0b101

5 LSB

0b111

7 LSB

The BU64985GWZ has an absolute output current range of 120mA which corresponds to a step resolution of

0.117mA/LSB.

Using a normal VCM actuator (non-bidirectional), it is possible to skip step mode during ISRC operation if a simpler

autofocus code sequence is desired. If there is no issue with moving the lens to point B using direct mode, then the

DAC code for point A should be left equal to 0. Additionally if the point A register is not set after the driver is initialized,

then the driver will automatically move the lens to point B with direct mode since the default value for point A is 0.

Controlling ISRC Mode

ISRC mode is the control period in which the lens is already floating and the driver smoothly moves the lens based on

the proprietary behavior of the ISRC algorithm. ISRC operation keeps ringing at a minimum while achieving the fastest

possible settling time based on the ISRC operational conditions.

ISRC mode is used when M=1, the reference DAC set to 0, and the present DAC code is greater than the DAC code for

point B. ISRC mode is also used when M=1 and the reference DAC set to a non-zero value. If the target DAC code

for point C is set so that the value is too large and will cause excess ringing, the point C DAC code is automatically

updated with a driver pre-determined value to minimize the ringing effect. When M=1 and the reference DAC set to 0,

the driver will automatically switch between direct mode, step mode, and ISRC mode when the point A, B, and C DAC

code conditions are met. The condition for this automatic transitioning to occur is when the register values for point B

and point C are set to values other than 0 and then the sequence will start when the EN bit is set equal to 1. Please

note that updates to point B and C DAC codes should be avoided during a focus operation in order to minimize poor

ringing effects.

Figure 12. Three Mode Sequential Operation (Shown as DAC Codes) for Traditional VCM Actuators

0

DAC code

Time (ms)

ISRC DAC codes*

Start sequence

B

A

C

Step mode

Direct mode

ISRC mode ※ ISRC DAC codes

– the details of ISRC

operation are

proprietary