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STM32F427XX Datasheet(PDF) 7 Page - STMicroelectronics |
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STM32F427XX Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 239 page ![]() DocID024030 Rev 9 7/238 STM32F427xx STM32F429xx List of tables 9 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table 2. STM32F427xx and STM32F429xx features and peripheral counts . . . . . . . . . . . . . . . . . . 15 Table 3. Voltage regulator configuration mode versus device operating mode . . . . . . . . . . . . . . . . 28 Table 4. Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5. Voltage regulator modes in stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6. Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 7. Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 8. USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 9. Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 10. STM32F427xx and STM32F429xx pin and ball definitions . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 11. FMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 12. STM32F427xx and STM32F429xx alternate function mapping . . . . . . . . . . . . . . . . . . . . . 74 Table 13. STM32F427xx and STM32F429xx register boundary addresses. . . . . . . . . . . . . . . . . . . . 86 Table 14. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Table 15. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Table 16. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Table 17. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 Table 18. Limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . 96 Table 19. VCAP1/VCAP2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Table 20. Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 97 Table 21. Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 97 Table 22. reset and power control block characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Table 23. Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Table 24. Typical and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator enabled except prefetch) or RAM . . . . . . 101 Table 25. Typical and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator disabled) . . . . . . . . . . . . . . . . . . . . . . . . . 102 Table 26. Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . 103 Table 27. Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . 104 Table 28. Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . 105 Table 29. Typical and maximum current consumptions in VBAT mode. . . . . . . . . . . . . . . . . . . . . . . 105 Table 30. Typical current consumption in Run mode, code with data processing running from Flash memory or RAM, regulator ON (ART accelerator enabled except prefetch), VDD=1.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Table 31. Typical current consumption in Run mode, code with data processing running from Flash memory, regulator OFF (ART accelerator enabled except prefetch). . . . . . . 108 Table 32. Typical current consumption in Sleep mode, regulator ON, VDD=1.7 V . . . . . . . . . . . . . 109 Table 33. Tyical current consumption in Sleep mode, regulator OFF. . . . . . . . . . . . . . . . . . . . . . . . 110 Table 34. Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Table 35. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Table 36. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Table 37. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Table 38. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Table 39. HSE 4-26 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Table 40. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Table 41. HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Table 42. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Table 43. Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 |
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