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VN7004CHTR Datasheet(PDF) 12 Page - STMicroelectronics |
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VN7004CHTR Datasheet(HTML) 12 Page - STMicroelectronics |
12 / 36 page ![]() Electrical specification VN7004CH 12/36 DocID027769 Rev 6 7 V < VCC < 18 V; -40 °C < Tj < 150 °C Symbol Parameter Test conditions Min. Typ. Max. Unit tD_OL_V Settling time for valid OFF-state open load diagnostic indication from rising edge of SEn VIN = 0 V; VOUT = 4 V; VSEn = 0 V to 5 V 60 µs tD_VOL OFF-state diagnostic delay time from rising edge of VOUT VIN = 0 V; VSEn = 5 V; VOUT = 0 V to 4 V 5 30 µs Fault diagnostic feedback (see Table 11: "Truth table") VSENSEH CurrentSense output voltage in fault condition VCC = 13 V; VIN = 0 V; VSEn = 5 V; IOUT = 0 A; VOUT = 4 V; RSENSE = 1 kΩ 5 6.6 V ISENSEH CurrentSense output current in fault condition VCC = 13 V; VSENSE = 5 V 7 20 30 mA CurrentSense timings (current sense mode)(3) tDSENSE1H Current sense settling time from rising edge of SEn VIN = 5 V; VSEn = 0 V to 5 V; RSENSE = 1 kΩ; RL = 0.87 Ω 60 µs tDSENSE1L Current sense disable delay time from falling edge of SEn VIN = 5 V; VSEn = 5 V to 0 V; RSENSE = 1 kΩ; RL = 0.87 Ω 5 20 µs tDSENSE2H Current sense settling time from rising edge of INPUT VIN = 0 V to 5 V; VSEn = 5 V; RSENSE = 1 kΩ; RL = 0.87 Ω 100 380 µs ΔtDSENSE2H Current sense settling time from rising edge of IOUT (dynamic response to a step change of IOUT) VIN = 5 V; VSEn = 5 V; RSENSE = 1 kΩ; ISENSE = 90% of ISENSEMAX; RL = 0.87 Ω 200 µs tDSENSE2L Current sense turn-off delay time from falling edge of INPUT VIN = 5 V to 0 V; VSEn = 5 V; RSENSE = 1 kΩ; RL = 0.87 Ω 50 250 µs Notes: (1)All values refer to VCC = 13 V; Tj = 25°C, unless otherwise specified. (2)Parameter guaranteed by design and characterization; not subject to production test. (3)Transition delay are measured up to ±10% of final conditions. |
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