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TLE94110EL Datasheet(PDF) 66 Page - Infineon Technologies AG |
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TLE94110EL Datasheet(HTML) 66 Page - Infineon Technologies AG |
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66 / 80 page  Data Sheet 66 1.0 2016-08-27 TLE94110EL Serial Peripheral Interface (SPI) 7.7.1 Status register definition Note: The LE bit in the Global Status register is read only. It reflects an OR combination of the respective open load and overcurrent errors of the half-bridge channels. If all OC/ OL bits of the respective high- side and low-side channels are cleared to ‘0’, the LE bit will be automatically updated to ‘0’. SYS_DIAG1 Global status 1 (Address Byte [OP]001 10[LABT]1B) D7 D6 D5 D4 D3 D2 D1 D0 SPI_ERR LE VS_UV VS_OV NPOR TSD TPW reserved r rc r rcrcrcrc rc r Field Bits Type Description SPI_ERR D7 rc SPI error detection 0B No SPI protocol error is detected (default value). 1B An SPI protocol error is detected. LE D6 r Load error detection (logic OR combination of Open Load and Overcurrent) 0B No Open Load and no Overcurrent detected (default value) 1B Open Load or Overcurrent detected in at least one of the power outputs. Error latched. Faulty output is latched off in case of Overcurrent VS_UV D5 rc VS Undervoltage error detection 0B No undervoltage on VS detected (default value) 1B Undervoltage on VS detected. Error latched and all outputs disabled. VS_OV D4 rc VS Overvoltage error detection 0B No overvoltage on VS detected (default value) 1B Overvoltage on VS detected. Error latched and all outputs disabled. NPOR D3 rc Not Power On Reset (NPOR) detection 0B POR on EN or VDD supply rail (default value) 1B No POR TSD D2 rc Temperature shutdown error detection 0B Junction temperature below temperature shutdown threshold (default value) 1B Junction temperature has reached temperature shutdown threshold. Error latched and all outputs disabled. TPW D1 rc Temperature pre-warning error detection 0B Junction temperature below temperature pre-warning threshold (default value) 1B Junction temperature has reached temperature pre-warning threshold. reserved D0 r Bit reserved. Always reads ‘0’. |
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