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HV9861ALG-G Datasheet(PDF) 3 Page - Microchip Technology |
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HV9861ALG-G Datasheet(HTML) 3 Page - Microchip Technology |
3 / 15 page 2014 Microchip Technology Inc. DS20005333A-page 3 HV9861A 1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS VIN to GND...................................................... -0.5V to +470V VDD to GND.......................................................................12V LD, PWMD, GATE to GND................. ....-0.3V to (V DD + 0.3V) CS, RT to GND .............................................. ....-0.3V to 5.0V Operating temperature..................................-40°C to +125°C Storage temperature .....................................-65°C to +150°C Continuous power dissipation (TA = +25°C) 8-lead SOIC ...............................................650 mW 16-lead SOIC ...........................................1000 mW Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions, above those indicated in the operational listings of this specification, is not implied. Expo- sure to maximum rating conditions for extended periods may affect device reliability. 1.1 ELECTRICAL SPECIFICATIONS TABLE 1-1: ELECTRICAL CHARACTERISTICS (SHEET 1 OF 2)1 Symbol Parameter Note Min Typ Max Units Conditions Input VINDC Input DC supply voltage range2 3 15 - 450 V DC input voltage IINSD Shut-down mode supply current 3 - 0.5 1.1 mA Pin PWMD to GND Internal Regulator VDD Internally regulated voltage - 7.25 7.50 8.20 V 500pF at GATE; RT = 226kΩ ∆VDD, line Line regulation of VDD -- - 1 V VIN = 15 - 450V, 500pF at GATE; RT = 226kΩ ∆VDD, load Load regulation of VDD -- - 100 mV IDD(ext) = 0 - 1mA, 500pF at GATE; RT = 226kΩ UVLO VDD under-voltage lockout threshold 3 6.45 - - V VIN rising ∆UVLO VDD under-voltage lockout hysteresis -- 500 - mV VIN falling ∆VDD(UV) VDD voltage margin 3 500 - - mV ∆VDD(UV) = VDD - UVLO IIN,MAX Maximum input current (limited by UVLO) 4 3.5 - - mA VIN = 15V, TA = 25°C 4 1.5 - - VIN = 15V, TA = 125°C PWM Dimming VEN(lo) PWMD input low voltage 3 -- 0.8 V VIN = 15 - 450V VEN(hi) PWMD input high voltage 3 2.2 - - V VIN = 15 - 450V IEN Internal pull-down current at PWMD -8.5 - 13.5 μAVPWMD = 0.8V |
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