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74LVC1G18GW Datasheet(PDF) 10 Page - NXP Semiconductors |
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74LVC1G18GW Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 14 page 2003 Jul 25 10 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 handbook, full pagewidth VEXT VCC VI VO MNA616 D.U.T. CL RT RL RL PULSE GENERATOR Fig.5 Load circuitry for switching times. Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VCC VI CL RL VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.65 to 1.95 V VCC 30 pF 1 k Ω open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6 V 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 6 V 4.5 to 5.5 V VCC 50 pF 500 Ω open GND 2 × VCC |
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