s Figure 1 ACX300AK/301AK/302AK Drive System Block

Diagram (Two-chip Structure)

s Figure 2 ACX300AK/301AK/302AK Drive System Block

Diagram (Single-chip Structure)

s Figure 3 ACX300AK/301AK/302AK Block Diagram

VST, VCK, EN, DWN,

WIDE, HST, HCK, RGT

PSIG, VCOM

LCD

panels

ACX300AK

ACX301AK

ACX302AK

RGB

drivers

R

Video signal

(NTSC or PAL)

CSYNC

FRP, HDO

FRP, BLK

G

B

CXD2472R

Psig/Vcom

gen.

Com

Pad

COM

LC

CS

Vertical

level

shifter

Negative

voltage gene-

ration circuit

Horizontal level shifter and shift register

(bidirectional scanning)

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

(The ACX302 has vertical shift registers on both sides of the screen.)

*1:

*2:

VST, VCK, EN, DWN,

WIDE, HST, HCK, RGT

PSIG, VCOM

LCD

panels

ACX300AK

ACX301AK

ACX302AK

R, G, B

Video signal*

1

CSYNC or

HD, VD*

1

3 V

SDAT, SCK, SEN

2

CXA3268R

Three-line serial

communication

(microcomputer

etc.)

When the internal sync separator is not used, CSYNC or HD and VD are

used as the input sync signal.

When the internal sync separator is used, sync on green (RGB) or sync on

Y (Y/color difference) is used as the input sync signal.

Power saving pin

(RGB or Y/color

difference)

(NTSC or PAL)

s Table 1

Panel Specifications Comparison

*: Supply voltage: 12 V

57.8

× 47.85

880

× 228 = 200,640

56.75

× 163.75

49.94

× 37.34

(6.24 cm diagonal)

7.0

11.4 to 14.0

50

60

Total number of dots

Dot pitch (

µm × µm)

Optical transmittance (%)

Supply voltage (V)

Power consumption* (mW)

ACX300AK

49.8

× 44.2

46

× 134

40.48

× 30.55

(5.07 cm diagonal)

6.0

ACX301AK

78.8

× 63.3

80

× 231.25

70.4

× 52.725

(8.80 cm diagonal)

8.5

ACX302AK