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MC14011BFELG Datasheet(PDF) 4 Page - ON Semiconductor |
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MC14011BFELG Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 11 page MC14001B Series http://onsemi.com 4 B−SERIES GATE SWITCHING TIMES SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C) Characteristic Symbol VDD Vdc Min Typ (Note 6) Max Unit Output Rise Time, All B−Series Gates tTLH = (1.35 ns/pF) CL + 33 ns tTLH = (0.60 ns/pF) CL + 20 ns tTLH = (0.40 ns/PF) CL + 20 ns tTLH 5.0 10 15 − − − 100 50 40 200 100 80 ns Output Fall Time, All B−Series Gates tTHL = (1.35 ns/pF) CL + 33 ns tTHL = (0.60 ns/pF) CL + 20 ns tTHL = (0.40 ns/pF) CL + 20 ns tTHL 5.0 10 15 − − − 100 50 40 200 100 80 ns Propagation Delay Time MC14001B, MC14011B only tPLH, tPHL = (0.90 ns/pF) CL + 80 ns tPLH, tPHL = (0.36 ns/pF) CL + 32 ns tPLH, tPHL = (0.26 ns/pF) CL + 27 ns All Other 2, 3, and 4 Input Gates tPLH, tPHL = (0.90 ns/pF) CL + 115 ns tPLH, tPHL = (0.36 ns/pF) CL + 47 ns tPLH, tPHL = (0.26 ns/pF) CL + 37 ns 8−Input Gates (MC14068B, MC14078B) tPLH, tPHL = (0.90 ns/pF) CL + 155 ns tPLH, tPHL = (0.36 ns/pF) CL + 62 ns tPLH, tPHL = (0.26 ns/pF) CL + 47 ns tPLH, tPHL 5.0 10 15 5.0 10 15 5.0 10 15 − − − − − − − − − 125 50 40 160 65 50 200 80 60 250 100 80 300 130 100 350 150 110 ns 5. The formulas given are for the typical characteristics only at 25 _C. 6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. VDD 14 CL VSS 7 PULSE GENERATOR INPUT OUTPUT 90% 50% 10% 10% 50% 90% 20 ns 20 ns tPHL tPLH tTLH tTHL VOL VOH 0 V VDD INPUT OUTPUT INVERTING *All unused inputs of AND, NAND gates must be connected to VDD. All unused inputs of OR, NOR gates must be connected to VSS. 90% 50% 10% VOL VOH OUTPUT NON-INVERTING tTHL tTLH tPLH tPHL * Figure 1. Switching Time Test Circuit and Waveforms |
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