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ELM327LSS Datasheet(PDF) 4 Page - ELM Electronics |
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ELM327LSS Datasheet(HTML) 4 Page - ELM Electronics |
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4 / 94 page  ELM327L Elm Electronics – Circuits for the Hobbyist www.elmelectronics.com Pin Descriptions 4 of 94 MCLR (pin 1) A momentary (>2µsec) logic low applied to this input will reset the ELM327. If unused, this pin should be connected to a logic high (VDD) level. Vmeasure (pin 2) This analog input is used to measure a 0 to 5V signal that is applied to it. Care must be taken to prevent the voltage from going outside of the supply levels of the ELM327, or damage may occur. If it is not used, this pin should be tied to either VDD or VSS. J1850 Volts (pin 3) This output can be used to control a voltage supply for the J1850 Bus+ output. The pin normally outputs a logic high level when a nominal 8V is required (for J1850 VPW), and a low level for 5V (for J1850 PWM), but this can be changed with PP 12. The total current into or from pin 3 must not exceed 2 mA. J1850 Bus+ (pin 4) This active high output is used to drive the J1850 Bus+ Line to an active (low) level. The total current into or from pin 4 must not exceed 2 mA. Memory (pin 5) This input controls the default state of the memory option. If this pin is at a high level during power-up or reset, the memory function will be enabled by default. If it is at a low level, then the default will be to have it disabled. Memory can always be enabled or disabled with the AT M1 and AT M0 commands. This input has Schmitt trigger waveshaping. Filter Cap (pin 6) The ELM327L requires that a 10µF filter capacitor be connected between pin 6 and VSS. The capacitor should be a low ESR (<5 Ω) ceramic or tantalum type. The ELM327 uses pin 6 for setting the initial baud rate after power on. Since this option is not available with the ELM327L, it defaults to an initial baud rate of 38400 bps. If you require 9600 bps, you must set PP 0C to 00. LFmode (pin 7) This input is used to select the default linefeed mode to be used after a power-up or system reset. If it is at a high level, then by default messages sent by the ELM327 will be terminated with both a carriage return and a linefeed character. If it is at a low level, lines will be terminated by a carriage return only. This behaviour can always be modified by issuing an AT L1 or AT L0 command. This input has Schmitt trigger waveshaping. VSS (pin 8) Circuit common must be connected to this pin. XT1 (pin 9) and XT2 (pin 10) A 4.000 MHz oscillator crystal is connected between these two pins. Loading capacitors as required by the crystal (typically 27pF each) will also need to be connected between each of these pins and circuit common (Vss). Note that this device has not been configured for operation with an external oscillator – it expects a crystal to be connected to these pins. Use of an external clock source is not recommended. Also, note that this oscillator is turned off when in the Low Power or ‘standby’ mode of operation. VPW In (pin 11) This is the active high input for the J1850 VPW data signal. When at rest (bus recessive) this pin should be at a low logic level. This input has Schmitt trigger waveshaping, so no special amplification is required. ISO In (pin 12) This is the active low input for the ISO 9141 and ISO 14230 data signal. It is derived from the K Line, and should be at a high logic level when at rest (bus recessive). No special amplification is required, as this input has Schmitt trigger waveshaping. PWM In (pin 13) This is the active low input for the J1850 PWM data signal. It should normally be at a high level when at rest (ie. bus recessive). This input has Schmitt trigger waveshaping, so no special amplification is required. J1850 Bus- (pin 14) This active high output is used to drive the J1850 Bus- Line to an active (dominant) level for J1850 PWM applications. ELM327L DSA |
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