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TPS7A9101DSKR Datasheet(PDF) 5 Page - Texas Instruments |
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TPS7A9101DSKR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 31 page 5 TPS7A91 www.ti.com SBVS282 – DECEMBER 2016 Product Folder Links: TPS7A91 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) When the device is connected to external feedback resistors at the FB pin, external resistor tolerances are not included. (2) The device is not tested under conditions where VIN > VOUT + 2.5 V and IOUT = 1 A because the power dissipation is higher than the maximum rating of the package. Also, this accuracy specification does not apply on any application condition that exceeds the power dissipation limit of the package under test. 6.5 Electrical Characteristics over operating temperature range (TJ = –40°C to +125°C), 1.4 V ≤ VIN ≤ 6.5 V, VOUT(NOM) = 0.8 V, IOUT = 5 mA, VEN = 1.4 V, CIN = COUT = 10 μF, CNR/SS = CFF = 0 nF, SS_CTRL = GND, and PG pin pulled up to VIN with 100 kΩ (unless otherwise noted); typical values are at TJ = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input supply voltage range 1.4 6.5 V VREF Reference voltage 0.8 V VUVLO Input supply UVLO VIN rising 1.31 1.39 V VHYS(UVLO) Input supply UVLO hysteresis 290 mV VOUT Output voltage range 0.8 5.2 V Output voltage accuracy(1) 1.4 V ≤ VIN ≤ 6.5 V, 5 mA ≤ IOUT ≤ 1 A –1.0% 1.0% ΔVOUT(ΔVIN) Line regulation 0.005 %/V ΔVOUT(ΔIOUT) Load regulation(2) 5 mA ≤ IOUT ≤ 1 A 0.02 %/A VDO Dropout voltage VIN ≥ 1.4 V, IOUT = 1 A, VFB = 0.8 V – 3% 200 mV ILIM Output current limit VOUT forced at 0.9 × VOUT(NOM), VIN = VOUT(NOM) + 300 mV 1.5 1.7 1.9 A IGND GND pin current VIN = 6.5 V, IOUT = 5 mA 2.1 3.5 mA VIN = 1.4 V, IOUT = 1 A 4 ISDN Shutdown GND pin current PG = (open), VIN = 6.5 V, VEN = 0.4 V 0.1 15 µA IEN EN pin current VIN = 6.5 V, 0 V ≤ VEN ≤ 6.5 V –0.2 0.2 µA VIL(EN) EN pin low-level input voltage (device disabled) 0 0.4 V VIH(EN) EN pin high-level input voltage (device enabled) 1.1 6.5 V ISS_CTRL SS_CTRL pin current VIN = 6.5 V, 0 V ≤ VSS_CTRL ≤ 6.5 V –0.2 0.2 µA VIT(PG) PG pin threshold For PG transitioning low with falling VOUT, expressed as a percentage of VOUT(NOM) 82% 88.9% 93% VHYS(PG) PG pin hysteresis For PG transitioning high with rising VOUT, expressed as a percentage of VOUT(NOM) 1% VOL(PG) PG pin low-level output voltage VOUT < VIT(PG), IPG = –1 mA (current into device) 0.4 V ILKG(PG) PG pin leakage current VOUT > VIT(PG), VPG = 6.5 V 1 µA INR/SS NR/SS pin charging current VNR/SS = GND, VSS_CTRL = GND 4.0 6.2 9.0 µA VNR/SS = GND, VSS_CTRL = VIN 65 100 150 IFB FB pin leakage current VIN = 6.5 V, VFB = 0.8 V –100 100 nA PSRR Power-supply ripple rejection f = 500 kHz, VIN = 3.8 V, VOUT(NOM) = 3.3 V, IOUT = 750mA, CNR/SS = 10 nF, CFF = 10 nF 39 dB Vn Output noise voltage BW = 10 Hz to 100 kHz, VIN = 1.8 V, VOUT(NOM) = 0.8 V, IOUT = 1.0 A, CNR/SS = 10 nF, CFF = 10 nF 4.7 µVRMS Noise spectral density f = 10 kHz, VIN = 1.8 V, VOUT(NOM) = 0.8 V, IOUT = 1.0 A, CNR/SS = 10 nF, CFF = 10 nF 13 nV/ √Hz Rdiss Output active discharge resistance VEN = GND 250 Ω Tsd Thermal shutdown temperature Shutdown, temperature increasing 160 °C Reset, temperature decreasing 140 |
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