ADuC845/ADuC847/ADuC848

Rev. B | Page 2 of 4

Background:

Issue:

Workaround A:

For Assembly code:

Do not use memory location 9AH.

For C code:

Assign a dummy variable to location 0x9A by using the following code, thereby preventing C

from using it.

idata unsigned int ui32Dummy[2] _at_ 0x9A;

Related Issues:

None.

4. ADC Noise [er004]

Background:

The ADuC845 incorporates two 24-bit Σ-∆ ADCs, and the ADuC847 and ADuC848 incorporate a 24-bit and 16-bit Σ-∆

ADC, respectively. These ADCs are specified for typical noise performance as described in the relevant noise tables of the

data sheet.

Issue:

ADC noise performance degrades when operating at maximum MCU clock frequency as determined via the CD bits in the

PLLCON SFR.

Workaround:

For the duration of an ADC conversion, the CD bits should be set to 3 or greater.

Note that the default CD setting is 3.

Related Issues:

None.

5. Watchdog Timer [er005]

Background:

The ADuC845, ADuC847, and ADuC848 incorporate a watchdog timer. The purpose of the WDT is to ensure that the part

is never stuck in an endless loop by generating either a hardware reset or an interrupt event that vectors to the WDT ISR.

Issue:

If the WDT generates an interrupt as opposed to a hardware reset, and if the ISR subsequently sets up the WDT to time

out to a hardware reset, the reset is ignored.

Workaround:

Ensure that a double write to the WDCON is executed inside the ISR, with the first write being a reset of the WDT. For

example:

void isr_wdt( void ) interrupt 11

{

WDWR = 1;

// This first WDT write is required to get the WDT to work inside the ISR.

WDCON

= 0x60; // Reset WDT.

WDWR = 1;

// Now set the WDT to the required 1s timeout

WDCON

= 0x62; // select reset after 1000mS

while(1);

}

void main(void)

{

EA = 0;

WDWR = 1;

// Allow write to WDCON

WDCON = 0x6A; // timeout=1000mS, WDT enable, WDT ISR Interrupt

while (1);

}

Related Issues:

None.

6. Stack Pointer in ULOAD Mode [er006]

Background:

When starting user code, the stack pointer should, by default, be initialized to Address 07H.

Issue:

In ULOAD mode, the stack pointer defaults to 03H causing conflict between RAM locations R4 to R7 and the stack.

Workaround:

Manually change in code the stack pointer address to 07H or to the address that is required upon entry to ULOAD mode,

that is,

MOV SP, #07H

or

SP = 0x07;

Related Issues:

None.