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IDT71V30S Datasheet(PDF) 11 Page - Integrated Device Technology |
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IDT71V30S Datasheet(HTML) 11 Page - Integrated Device Technology |
11 / 15 page 6.42 IDT71V30S/L High-Speed 1K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 11 INT Clears Timing Waveform of Interrupt Mode(1) INT Sets NOTES:. 1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”. 2. See Interrupt Truth Table II. 3. Timing depends on which enable signal (CE or R/W) is asserted last. 4. Timing depends on which enable signal (CE or R/W) is de-asserted first. NOTES: 1. 'X' in part number indicates power rating (S or L). 2. Industrial temperature: for specific speeds, packages and powers contact your sales office. AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1,2) 71V30X25 Com'l Only 71V30X35 Com'l & Ind 71V30X55 Com'l Only Unit Symbol Parameter Min. Max. Min. Max. Min. Max. INTERRUPT TIMING tAS Address Set-up Time 0 ____ 0 ____ 0 ____ ns tWR Write Recovery Time 0 ____ 0 ____ 0 ____ ns tINS Interrupt Set Time ____ 25 ____ 25 ____ 45 ns tINR Interrupt Reset Time ____ 25 ____ 25 ____ 45 ns 3741 tbl 12 tINS ADDR'A' INT'B' INTERRUPT ADDRESS tWC tAS R/ W'A' tWR 3741 drw 14 (3) (3) (2) (4) tRC INTERRUPT CLEAR ADDRESS ADDR'B' OE'B' tINR INT'A' 3741 drw 15 tAS (3) (3) |
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