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71V321S55TFGI8 Datasheet(PDF) 1 Page - Integrated Device Technology |
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71V321S55TFGI8 Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 15 page ©2015 Integrated Device Technology, Inc. OCTOBER 2015 DSC-3026/12 1 HIGH SPEED 3.3V 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS IDT71V321S/L Features ◆ ◆ ◆ ◆ ◆ High-speed access – Commercial & Industrial: 25/35/55ns (max.) ◆ ◆ ◆ ◆ ◆ Low-power operation – IDT71V321S — Active: 325mW (typ.) — Standby: 5mW (typ.) – IDT71V321L — Active: 325mW (typ.) — Standby: 1mW (typ.) ◆ ◆ ◆ ◆ ◆ Two INT flags for port-to-port communications Functional Block Diagram NOTES: 1. IDT71V321(MASTER):BUSYisanoutput 2. BUSYandINTaretotem-poleoutputs. ◆ ◆ ◆ ◆ ◆ On-chip port arbitration logic (IDT71V321 only) ◆ ◆ ◆ ◆ ◆ BUSY output flag ◆ ◆ ◆ ◆ ◆ Fully asynchronous operation from either port ◆ ◆ ◆ ◆ ◆ Battery backup operation—2V data retention (L only) ◆ ◆ ◆ ◆ ◆ TTL-compatible, single 3.3V power supply ◆ ◆ ◆ ◆ ◆ Available in 52-pin PLCC, 64-pin TQFP and STQFP packages ◆ ◆ ◆ ◆ ◆ Industrial temperature range (–40°C to +85°C) is available for selected speeds ◆ ◆ ◆ ◆ ◆ Green parts available, see ordering information I/O Control Address Decoder MEMORY ARRAY ARBITRATION and INTERRUPT LOGIC Address Decoder I/O Control R/ WL CEL OEL BUSYL A10L A0L 3026 drw 01 I/O0L- I/O7L CEL OEL R/ WL INTL BUSYR I/O0R-I/O7R A10R A0R INTR CER OER (2) (1,2) (1,2) (2) R/ WR CER OER 11 11 R/ WR |
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