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70V06L25GG8 Datasheet(PDF) 1 Page - Integrated Device Technology

Part # 70V06L25GG8
Description  HIGH-SPEED 3.3V 16K x 8 DUAL-PORT STATIC RAM
Download  23 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

70V06L25GG8 Datasheet(HTML) 1 Page - Integrated Device Technology

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6.07
AUGUST 2015
DSC-2942/10
1
©2015 Integrated Device Technology, Inc.
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
I/O
Control
R/
WL
CEL
OEL
BUSYL
A13L
A0L
2942 drw 01
I/O0L-I/O7L
CEL
OEL
R/
WL
SEML
INTL
M/
S
BUSYR
I/O0R-I/O7R
A13R
A0R
SEMR
INTR
CER
OER
(2)
(1,2)
(1,2)
(2)
R/
WR
CER
OER
14
14
R/WR
,
IDT70V06S/L
HIGH-SPEED 3.3V
16K x 8 DUAL-PORT
STATIC RAM
Features
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
– Commercial: 15/20/25/35/55ns (max.)
– Industrial: 20/25ns (max.)
Low-power operation
– IDT70V06S
Active: 400mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V06L
Active: 380mW (typ.)
Standby: 660µW (typ.)
IDT70V06 easily expands data bus width to 16 bits or more
using the Master/Slave select when cascading more than
one device
M/S = VIH for BUSY output flag on Master
M/S = VIL for BUSY input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
Battery backup operation—2V data retention
TTL-compatible, single 3.3V (±0.3V) power supply
Available in 68-pin PGA and PLCC, and a 64-pin TQFP
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Functional Block Diagram
NOTES:
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.
2. BUSY outputs and INT outputs are non-tri-stated push-pull.


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