6.42

IDT70T3509M

High-Speed 2.5V

1024K x 36 Dual-Port Synchronous Static RAM

Commercial Temperature Range

11

An

An + 1

An + 2

An + 3

R/W

ADDRESS

CLK

(3)

OE

Qn

Qn + 1

Qn + 2

5682 drw 05

(1)

(1)

(4)

(1 Latency)

(5)

(5)

,

Timing Waveform of Read Cycle for Pipelined Operation

NOTES:

1. OE is asynchronously controlled; all other inputs depicted in the above waveforms are synchronous to the rising clock edge.

Truth Table 1.

are for reference use only.

6. "x" denotes Left or Right port. The diagram is with respect to that port.

Timing Waveform of Read Cycle for Flow-Through Output

An

An + 1

An + 2

An + 3

R/W

ADDRESS

CLK

OE

Qn

Qn + 1

Qn + 2

5682 drw 06

(5)

(1)

BEn

(3)

(4)

,