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70V9369L6PFGI Datasheet(PDF) 5 Page - Integrated Device Technology |
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70V9369L6PFGI Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 17 page 6.42 IDT70V9369L High-Speed 3.3V 16K x 18 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges 5 DC Electrical Characteristics Over the Operating Temperature Supply Voltage Range(3) (VDD = 3.3V ± 0.3V) DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VDD = 3.3V ± 0.3V) NOTE: 1. AtVDD<2.0Vinputleakagesareundefined. NOTES: 1. Atf=fMAX,addressandcontrollines(exceptOutputEnable)arecyclingatthemaximumfrequencyclockcycleof1/tCYC,using"ACTESTCONDITIONS"atinputlevelsofGNDto3V. 2. f=0meansnoaddress,clock,orcontrollineschange.AppliesonlytoinputatCMOSlevelstandby. 3. Port"A"maybeeitherleftorright port.Port"B"istheoppositefromport"A". 4. VDD = 3.3V, TA = 25°C for Typ, and are not production tested. IDDDC(f=0)= 90mA (Typ). 5. CEX = VIL means CE0X = VIL and CE1X = VIH CEX = VIH means CE0X = VIH or CE1X = VIL CEX < 0.2V means CE0X< 0.2V and CE1X > VDD - 0.2V CEX > VDD - 0.2V means CE0X > VDD - 0.2V or CE1X < 0.2V "X"represents"L"forleftportor"R"forrightport. Symbol Parameter Test Conditions 70V9369L Unit Min. Max. |ILI| Input Leakage Current(1) VDD = 3.6V, VIN = 0V to VDD ___ 5µA |ILO| Output Leakage Current CEO = VIH or CE1 = VIL, VOUT = 0V to VDD ___ 5µA VOL Output Low Voltage IOL = +4mA ___ 0.4 V VOH Output High Voltage IOH = -4mA 2.4 ___ V 5648 tbl 08 70V9369L6 Com'l Only 70V9369L7 Com'l & Ind 70V9369L9 Com'l Only 70V9369L12 Com'l Only Symbol Parameter Test Condition Version Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Unit IDD Dynamic Operating Current (Both Ports Active) CEL and CER= VIL, Outputs Disabled, f = fMAX(1) COM'L L 220 350 200 290 180 225 150 205 mA IND L ____ ____ 200 335 ____ ____ ____ ____ ISB1 Standby Current (Both Ports - TTL Level Inputs) CEL = CER = VIH f = fMAX(1) COM'L L 70 130 65 100 50 65 40 50 mA IND L ____ ____ 65 115 ____ ____ ____ ____ ISB2 Standby Current (One Port - TTL Level Inputs) CE"A" = VIL and CE"B" = VIH(5) Active Port Outputs Disabled, f=fMAX(1) COM'L L 150 250 140 210 110 150 100 140 mA IND L ____ ____ 140 240 ____ ____ ____ ____ ISB3 Full Standby Current (Both Ports - CMOS Level Inputs) Both Ports CEL and CER > VDD - 0.2V, VIN > VDD - 0.2V or VIN < 0.2V, f = 0(2) COM'L L 0.45 0.450.4 5 0.4 5 mA IND L ____ ____ 0.4 15 ____ ____ ____ ____ ISB4 Full Standby Current (One Port - CMOS Level Inputs) CE"A" < 0.2V and CE"B" > VDD - 0.2V(5) VIN > VDD - 0.2V or VIN < 0.2V, Active Port, Outputs Disabled, f = fMAX(1) COM'L L 140 240 130 200 100 140 90 130 mA IND L ____ ____ 130 230 ____ ____ ____ ____ 5648 tbl 09 |
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