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70V3389S5BCGI Datasheet(PDF) 5 Page - Integrated Device Technology |
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70V3389S5BCGI Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 17 page 6.42 IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges 5 NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. ADS, CNTEN, CNTRST = X. 3. OE is an asynchronous input signal. Truth Table I—Read/Write and Enable Control(1,2,3) Pin Names Left Port Right Port Names CE0L, CE1L CE0R, CE1R Chip Enables R/WL R/WR Read/Write Enable OEL OER Output Enable A0L - A15L A0R - A15R Address I/O0L - I/O17L I/O0R - I/O17R Data Input/Output CLKL CLKR Clock ADSL ADSR Address Strobe Enable CNTENL CNTENR Counter Enable CNTRSTL CNTRSTR Counter Reset UBL - LBL UBR - LBR Byte Enables (9-bit bytes) VDDQL VDDQR Power (I/O Bus) (3.3V or 2.5V)(1) OPTL OPTR Option for selecting VDDQX(1,2) VDD Power (3.3V)(1) VSS Ground (0V) 4832 tbl 01 OE CLK CE0 CE1 UB LB R/W Upper Byte I/O9-18 Lower Byte I/O0-8 MODE X ↑ L H H H X High-Z High-Z All Bytes Deselected X ↑ LH H L L High-Z DIN Write to Lower Byte Only X ↑ LH L H L DIN High-Z Write to Upper Byte Only X ↑ LH L L L DIN DIN Write to Both Bytes L ↑ LH H L H High-Z DOUT Read Lower Byte Only L ↑ LH L H H DOUT High-Z Read Upper Byte Only L ↑ LH L L H DOUT DOUT Read Both Bytes H ↑ L H L L X High-Z High-Z Outputs Disabled 4832 tbl 02 NOTES: 1. VDD, OPTX, and VDDQX must be set to appropriate operating levels prior to applying inputs on the I/Os and controls for that port. 2. OPTX selects the operating voltage levels for the I/Os and controls on that port. If OPTX is set to VIH (3.3V), then that port's I/Os and controls will operate at 3.3V levels and VDDQX must be supplied at 3.3V. If OPTX is set to VIL (0V), then that port's I/Os and controls will operate at 2.5V levels and VDDQX must be supplied at 2.5V. The OPT pins are independent of one another—both ports can operate at 3.3V levels, both can operate at 2.5V levels, or either can operate at 3.3V with the other at 2.5V. |
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