W83L785R/W83L785G

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6. FUNCTIONAL DESCRIPTION

6.1 General Description

The W83L785R/G provides most 4 analog positive inputs, 2 fan speed monitors, 2 sets for fan PWM

(Pulse Width Modulation) control, 2 remote thermal inputs from remote thermistors or 2N3904

transistors or Pentium

power down this chip to save power, but I2C interface is still working. When W83L785R/G starts the

monitor function on the chip, the Watch Dog machine monitors every function and store the value to

registers. If the monitor value exceeds the limit value, the interrupt status will be set to 1.

6.2 Access Interface

The W83L785R/G provides I

address defined value is 0101101.

6.2.1

The first serial bus access timing is shown as follow:

(a) Serial bus write to internal address register followed by the data byte

0

Start By

Master

01011

01

D7

D6

D5

D4

D3

D2

D1

D0

Ack

by

785R

R/W

Ack

by

785R

SCL

SDA

D7

D6

D5

D4

D3

D2

D1

D0

Ack

by

784R

Stop

by

Master

SCL

SDA (Continued)

78

0

7

8

0

78

Frame 2

Internal Index Register Byte

(Continued)

Frame 3

Data Byte

Frame 1

Serial Bus Address Byte

Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte

Ack

by

785R

(b) Serial bus read form internal address register followed by the data byte

0

Start By

Master

0

1011

01

D7

D6

D5

D4

D3

D2

D1

D0

ack

by

785R

R/W

ack

by

785R

D7

D6

D5

D4

D3

D2

D1

D0

Ack

by

784R

Stop by

Master

78

0

7

8

Frame 2

Internal Index Register Byte

Frame 4

Data Byte

Frame 1

Serial Bus Address Byte

Figure 2. Serial Bus read from Internal Address Register followed by the Data Byte

01234567801

345

26

7

1

01

1

00

1

R/W

8

ack

by

785R

Frame 3

Serial Bus Byte

ack

by

785R

SCL

SDA

SCL(Continued)

SDA(Continued)