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X25138P-V Datasheet(PDF) 2 Page - Xicor Inc. |
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X25138P-V Datasheet(HTML) 2 Page - Xicor Inc. |
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2 / 18 page  X25138 2 PIN DESCRIPTIONS Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input (SI) SI is the serial data input pin. All opcodes, byte addresses, and data to be written to the memory are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The Serial Clock controls the serial bus timing for data input and output. Opcodes, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin change after the falling edge of the clock input. Chip Select (CS) When CS is HIGH, the X25138 is deselected and the SO output pin is at high impedance and unless an internal write operation is underway, the X25138 will be in the standby power mode. CS LOW enables the X25138, placing it in the active power mode. It should be noted that after power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Write Protect (WP) When WP is LOW and the nonvolatile bit WPEN is “1”, nonvolatile writes to the X25138 status register are disabled, but the part otherwise functions normally. When WP is held HIGH, all functions, including nonvolatile writes operate normally. WP going LOW while CS is still LOW will interrupt a write to the X25138 status register. If the internal write cycle has already been initiated, WP going LOW will have no affect on a write. The WP pin function is blocked when the WPEN bit in the status register is “0”. This allows the user to install the X25138 in a system with WP pin grounded and still be able to write to the status register. The WP pin func- tions will be enabled when the WPEN bit is set “1”. Hold (HOLD) HOLD is used in conjunction with the CS pin to pause the device. Once the part is selected and a serial sequence is underway, HOLD may be used to pause 14 Lead SOIC NC 1 2 3 4 7 6 5 X25138 VSS NC NC NC NC .228” .336” 8 9 10 11 12 14 13 NC 8 Lead PDIP/SOIC VCC HOLD SCK CS 1 2 3 4 6 7 8 X25138 VSS SI 5 SO WP CS SO WP VCC HOLD SCK SI 8-Lead XBGA: Top View S0 SI WP SCK VCC VSS CS HOLD 8 7 6 5 1 2 3 4 .238” SCK 1 2 3 4 8 7 6 5 8-LEAD TSSOP X25138 .252 in. SI Vss CS HOLD WP .078” SO Vcc 3091 FM 03 .114” PIN NAMES 7037 FRM T01 Symbol Description CS Chip Select Input SO Serial Output SI Serial Input SCK Serial Clock Input WP Write Protect Input VSS Ground VCC Supply Voltage HOLD Hold Input NC No Connect PIN CONFIGURATION |
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