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AD7616BSTZ-RL Datasheet(PDF) 9 Page - Analog Devices |
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AD7616BSTZ-RL Datasheet(HTML) 9 Page - Analog Devices |
9 / 51 page AD7616 Data Sheet Rev. 0 | Page 8 of 50 Parallel Mode Timing Specifications Table 3. Parameter Min Typ Max Unit Description tRD_SETUP 10 ns CS falling edge to RD falling edge setup time tRD_HOLD 10 ns RD rising edge to CS rising edge hold time tRD_HIGH 10 ns RD high pulse width tRD_LOW 30 ns RD low pulse width tDOUT_SETUP 30 ns Data access time after falling edge of RD tDOUT_3STATE 11 ns CS rising edge to DBx high impedance tWR_SETUP 10 ns CS to WR setup time tWR_HIGH 20 ns WR high pulse width tWR_LOW 30 ns WR low pulse width tWR_HOLD 10 ns WR hold time tDIN_SETUP 30 ns Configuration data to WR setup time tDIN_HOLD 10 ns Configuration data to WR hold time tCONF_SETTLE 20 ns Configuration data settle time, WR rising edge to CONVST rising edge Figure 4. Parallel Read Timing Diagram Figure 5. Parallel Write Timing Diagram CONVST BUSY CS RD CONV A CONV B DB15 TO DB0 tDOUT_3STATE tRD_SETUP tDOUT_SETUP tRD_LOW tRD_HIGH tRD_HOLD CONVST CS WR WRITE REG 1 WRITE REG 2 DB0 TO DB15 tCONF_SETTLE tWR_HIGH tDIN_HOLD tDIN_SETUP tWR_HOLD tWR_SETUP tWR_LOW |
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