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MC14XXXBCP Datasheet(PDF) 1 Page - Motorola, Inc |
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MC14XXXBCP Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 13 page MOTOROLA CMOS LOGIC DATA 1 MC14560B NBCD Adder The MC14560B adds two 4–bit numbers in NBCD (natural binary coded decimal) format, resulting in sum and carry outputs in NBCD code. This device can also subtract when one set of inputs is complemented with a 9’s Complementer (MC14561B). All inputs and outputs are active high. The carry input for the least significant digit is connected to VSS for no carry in. • Diode Protection on All Inputs • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/ _C From 100_C To 125_C TRUTH TABLE* Input Output A4 A3 A2 A1 B4 B3 B2 B1 Cin Cout S4 S3 S2 S1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 1 1 0 1 0 0 0 0 1 1 1 0 1 0 0 0 1 0 0 0 1 0 1 1 1 0 1 0 0 1 1 0 0 1 0 1 0 0 0 0 1 0 1 0 1 0 0 1 1 0 1 1 0 1 0 0 0 0 1 0 1 0 0 1 0 0 1 1 0 0 1 1 1 1 0 0 1 * Partial truth table to show logic operation for representative input values. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 REV 3 1/94 MC14559B See Page 398 © Motorola, Inc. 1994 REV 0 1/94 MC14560B BLOCK DIAGRAM L SUFFIX CERAMIC CASE 620 ORDERING INFORMATION MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD SOIC TA = – 55° to 125°C for all packages. P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B 7 13 15 14 1 2 3 4 5 6 12 11 10 9 Cin A1 B1 A2 B2 A3 B3 A4 B4 S1 S2 S3 S4 Cout VDD = PIN 16 VSS = PIN 8 |
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