MOTOROLA CMOS LOGIC DATA

MC14568B

8

If used in cascade with the programmable divide–by–N

counter, practically all usual reference frequencies, or chan-

nel spacings of 25, 20, 12.5, 10, 6.25 kHz, etc. are easily

achievable.

PROGRAMMABLE DIVIDE–BY–N

4–BIT COUNTER (D2)

This counter is programmable by using inputs DP0 ... DP3

(pins 7 ... 4). The Preset Enable input enables the parallel

preset inputs DP0... DP3. The “0” output must be externally

connected to the PE input for single stage applications.

Since there is not a cascade feedback input, this counter,

when cascaded, must be used as the most significant digit.

Because of this, it can be cascaded with binary counters as

well as with BCD counters (MC14569B, MC14522B,

MC14526B).

TYPICAL APPLICATIONS

Figure 6. Cascading MC14568B and MC14522B or MC14526B with MC14569B

fin

CF

C

MC14569B

ZERO DETECT

CF

C

MC14522B

OR

MC14526B

Q4

PE

“0”

CF

C

MC14522B

OR

MC14526B

Q4

PE

“0”

Q1/C2

PE

“0”

MC14568B

LSD

MSD

fout

DP0 – – – – – – DP3

DP0 – – – – – – DP3

DP0 – – – – – – DP3

Figure 7. Frequency Synthesizer with MC14568B and MC14569B Using a Mixer

(Channel Spacing 10 kHz)

Frequencies shown in parenthesis are given as an example.

(40 kHz)

VSS

PE

DP0 – – – – DP3

PCin

C1

CTI

“0”

PCout

G

F

Q1/C2

VSS

VSS

VCO

fout

(144 – 146 MHz)

VDD

MC14011

CF

Q

ZERO DETECT

C

CRYSTAL

OSCILLATOR

2 k

2M

MC14568B

MC14569B

MIXER

(143.5 MHz)