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MC14580B Datasheet(PDF) 1 Page - Motorola, Inc |
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MC14580B Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 7 page MOTOROLA CMOS LOGIC DATA 1 MC14580B 4 x 4 Multiport Register The MC14580B is a 4 by 4 multiport register useful in small scratch pad memories, arithmetic operations when coupled with an adder, and other data storage applications. It allows independent reading of any two words (or the same word at both outputs) while writing into any one of four words. Address changing and data entry occur on the rising edge of the clock. When the write enable input is low, the contents of any word may be accessed but not altered. • No Restrictions on Clock Input Rise or Fall Times • 3–State Outputs • Single Phase Clocking • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low–power TTL Loads or one Low–power Schottky TTL Load Over the Rated Temperature Range • Pin Compatible with CD40108 MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/ _C From 100_C To 125_C BLOCK DIAGRAM CLOCK 16 15 20 19 17 19 18 DATA INPUT WE R1B R0B R1A R0A W1 W0 10 11 14 13 9 8 DECODER 3–STATE A 3 4 5 6 7 22 23 2 1 21 3–STATE B 4 X 4 MEMORY VDD = PIN 24 VSS = PIN 12 D0 D1 D2 D3 Q0A Q1A Q2A Q3A Q0B Q1B Q2B Q3B WORD A OUTPUT WORD B OUTPUT MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 REV 3 1/94 MC14580B L SUFFIX CERAMIC CASE 623 ORDERING INFORMATION MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBDW SOIC TA = – 55° to 125°C for all packages. P SUFFIX PLASTIC CASE 709 DW SUFFIX SOIC CASE 751E PIN ASSIGNMENT Q2A Q0A 3–STATE A Q2B Q3B WRITE 0 Q3A Q1A D0 3–STATE B Q0B Q1B VDD WE CLOCK D3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 13 11 12 21 22 23 24 READ 0A READ 1A D2 D1 READ 0B VSS READ 1B WRITE 1 |
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