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TCS34725 Datasheet(PDF) 10 Page - ams AG |
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TCS34725 Datasheet(HTML) 10 Page - ams AG |
10 / 40 page Page 10 ams Datasheet Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Timing Characteristics The timing characteristics of TCS3472 are given below. Figure 11: AC Electrical Characteristics, VDD = 3 V, TA = 25ºC (unless otherwise noted) Note(s): 1. Specified by design and characterization; not production tested. Timing Diagram Figure 12: Parameter Measurement Information Parameter Description Min Typ Max Units f(SCL) Clock frequency (I²C only) 0 400 kHz t(BUF) Bus free time between start and stop condition 1.3 μs t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs t(SUSTA) Repeated start condition setup time 0.6 μs t(SUSTO) Stop condition setup time 0.6 μs t(HDDAT) Data hold time 0 0.9 μs t(SUDAT) Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF Timing Characteristics |
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